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Commit 8bf89a5c authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: disable L0s for PCIe0 and PCIe1 on sm8150"

parents 31bafe74 f20e0ac6

arch/arm64/boot/dts/qcom/sm8150-pcie.dtsi

+4 −0
Original line number Diff line number Diff line
@@ -208,6 +208,8 @@ 
		qcom,vreg-cx-voltage-level = <RPMH_REGULATOR_LEVEL_MAX

						RPMH_REGULATOR_LEVEL_NOM 0>;



		qcom,no-l0s-supported;



		qcom,max-link-speed = <0x3>;



		qcom,ep-latency = <10>;
@@ -526,6 +528,8 @@ 
		qcom,vreg-cx-voltage-level = <RPMH_REGULATOR_LEVEL_MAX

						RPMH_REGULATOR_LEVEL_NOM 0>;



		qcom,no-l0s-supported;



		qcom,max-link-speed = <0x3>;



		qcom,ep-latency = <10>;