Loading drivers/net/tg3.c +12 −14 Original line number Diff line number Diff line Loading @@ -13086,17 +13086,15 @@ static inline u32 tg3_rx_ret_ring_size(struct tg3 *tp) return 512; } static int __devinit tg3_get_invariants(struct tg3 *tp) { static struct pci_device_id write_reorder_chipsets[] = { { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_FE_GATE_700C) }, { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_BRIDGE) }, { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8385_0) }, DEFINE_PCI_DEVICE_TABLE(write_reorder_chipsets) = { { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_FE_GATE_700C) }, { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_BRIDGE) }, { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8385_0) }, { }, }; static int __devinit tg3_get_invariants(struct tg3 *tp) { u32 misc_ctrl_reg; u32 pci_state_reg, grc_misc_cfg; u32 val; Loading Loading @@ -14229,6 +14227,11 @@ static int __devinit tg3_do_test_dma(struct tg3 *tp, u32 *buf, dma_addr_t buf_dm #define TEST_BUFFER_SIZE 0x2000 DEFINE_PCI_DEVICE_TABLE(dma_wait_state_chipsets) = { { PCI_DEVICE(PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_UNI_N_PCI15) }, { }, }; static int __devinit tg3_test_dma(struct tg3 *tp) { dma_addr_t buf_dma; Loading Loading @@ -14398,11 +14401,6 @@ static int __devinit tg3_test_dma(struct tg3 *tp) } if ((tp->dma_rwctrl & DMA_RWCTRL_WRITE_BNDRY_MASK) != DMA_RWCTRL_WRITE_BNDRY_16) { static struct pci_device_id dma_wait_state_chipsets[] = { { PCI_DEVICE(PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_UNI_N_PCI15) }, { }, }; /* DMA test passed without adjusting DMA boundary, * now look for chipsets that are known to expose the Loading Loading
drivers/net/tg3.c +12 −14 Original line number Diff line number Diff line Loading @@ -13086,17 +13086,15 @@ static inline u32 tg3_rx_ret_ring_size(struct tg3 *tp) return 512; } static int __devinit tg3_get_invariants(struct tg3 *tp) { static struct pci_device_id write_reorder_chipsets[] = { { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_FE_GATE_700C) }, { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_BRIDGE) }, { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8385_0) }, DEFINE_PCI_DEVICE_TABLE(write_reorder_chipsets) = { { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_FE_GATE_700C) }, { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_BRIDGE) }, { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8385_0) }, { }, }; static int __devinit tg3_get_invariants(struct tg3 *tp) { u32 misc_ctrl_reg; u32 pci_state_reg, grc_misc_cfg; u32 val; Loading Loading @@ -14229,6 +14227,11 @@ static int __devinit tg3_do_test_dma(struct tg3 *tp, u32 *buf, dma_addr_t buf_dm #define TEST_BUFFER_SIZE 0x2000 DEFINE_PCI_DEVICE_TABLE(dma_wait_state_chipsets) = { { PCI_DEVICE(PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_UNI_N_PCI15) }, { }, }; static int __devinit tg3_test_dma(struct tg3 *tp) { dma_addr_t buf_dma; Loading Loading @@ -14398,11 +14401,6 @@ static int __devinit tg3_test_dma(struct tg3 *tp) } if ((tp->dma_rwctrl & DMA_RWCTRL_WRITE_BNDRY_MASK) != DMA_RWCTRL_WRITE_BNDRY_16) { static struct pci_device_id dma_wait_state_chipsets[] = { { PCI_DEVICE(PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_UNI_N_PCI15) }, { }, }; /* DMA test passed without adjusting DMA boundary, * now look for chipsets that are known to expose the Loading