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Commit 8876ce7d authored by Jisheng Zhang's avatar Jisheng Zhang Committed by Jason Cooper
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irqchip: dw-apb-ictl: Always use use {readl|writel}_relaxed



There's no DMA at all, the device type memory attribute can ensure the
operations order and relaxed version imply compiler barrier, so we are safe
to use relaxed version to improve the performance a bit.

Signed-off-by: default avatarJisheng Zhang <jszhang@marvell.com>
Acked-by: default avatarSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Link: https://lkml.kernel.org/r/1415773374-4629-2-git-send-email-jszhang@marvell.com


Signed-off-by: default avatarJason Cooper <jason@lakedaemon.net>
parent 377df64a
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+6 −6
Original line number Diff line number Diff line
@@ -94,16 +94,16 @@ static int __init dw_apb_ictl_init(struct device_node *np,
	 */

	/* mask and enable all interrupts */
	writel(~0, iobase + APB_INT_MASK_L);
	writel(~0, iobase + APB_INT_MASK_H);
	writel(~0, iobase + APB_INT_ENABLE_L);
	writel(~0, iobase + APB_INT_ENABLE_H);
	writel_relaxed(~0, iobase + APB_INT_MASK_L);
	writel_relaxed(~0, iobase + APB_INT_MASK_H);
	writel_relaxed(~0, iobase + APB_INT_ENABLE_L);
	writel_relaxed(~0, iobase + APB_INT_ENABLE_H);

	reg = readl(iobase + APB_INT_ENABLE_H);
	reg = readl_relaxed(iobase + APB_INT_ENABLE_H);
	if (reg)
		nrirqs = 32 + fls(reg);
	else
		nrirqs = fls(readl(iobase + APB_INT_ENABLE_L));
		nrirqs = fls(readl_relaxed(iobase + APB_INT_ENABLE_L));

	domain = irq_domain_add_linear(np, nrirqs,
				       &irq_generic_chip_ops, NULL);