Loading Documentation/devicetree/bindings/clock/qcom,scc.txt +2 −1 Original line number Diff line number Diff line Loading @@ -2,7 +2,8 @@ Qualcomm Technologies, Inc. Sensor Clock Controller Bindings Required properties: - compatible: shall contain "qcom,scc-sm8150" or "qcom,scc-sm8150-v2" or "qcom,scc-sm6150" or "qcom,scc-sa6155" or "qcom,scc-sa8195". "qcom,scc-sm6150" or "qcom,scc-sa6155" or "qcom,scc-sa8195" or "qcom,scc-sa8155" or "qcom,scc-sa8155-v2". - reg: shall contain base register location and length. - vdd_scc_cx-supply: the logic rail supply. - #clock-cells: shall contain 1. Loading drivers/clk/qcom/scc-sm8150.c +25 −1 Original line number Diff line number Diff line Loading @@ -576,11 +576,28 @@ static const struct qcom_cc_desc scc_sm8150_desc = { static const struct of_device_id scc_sm8150_match_table[] = { { .compatible = "qcom,scc-sm8150" }, { .compatible = "qcom,scc-sm8150-v2" }, { .compatible = "qcom,scc-sa8155" }, { .compatible = "qcom,scc-sa8155-v2" }, { .compatible = "qcom,scc-sa8195" }, { } }; MODULE_DEVICE_TABLE(of, scc_sm8150_match_table); static int scc_sa8155_resume(struct device *dev) { struct regmap *regmap = dev_get_drvdata(dev); /* Reconfigure the scc pll */ scc_pll.inited = false; clk_trion_pll_configure(&scc_pll, regmap, scc_pll.config); return 0; } static const struct dev_pm_ops scc_sa8155_pm_ops = { .restore_early = scc_sa8155_resume, }; static void scc_sa8195_fixup(struct platform_device *pdev) { if (of_device_is_compatible(pdev->dev.of_node, "qcom,scc-sa8195")) { Loading Loading @@ -645,9 +662,16 @@ static int scc_sm8150_fixup(struct platform_device *pdev, struct regmap *regmap) return -EINVAL; if (!strcmp(compat, "qcom,scc-sm8150-v2") || !strcmp(compat, "qcom,scc-sa8195")) !strcmp(compat, "qcom,scc-sa8195") || !strcmp(compat, "qcom,scc-sa8155-v2")) scc_sm8150_fixup_sm8150v2(regmap); if (!strcmp(compat, "qcom,scc-sa8155") || !strcmp(compat, "qcom,scc-sa8155-v2")) { pdev->dev.driver->pm = &scc_sa8155_pm_ops; dev_set_drvdata(&pdev->dev, regmap); } return 0; } Loading Loading
Documentation/devicetree/bindings/clock/qcom,scc.txt +2 −1 Original line number Diff line number Diff line Loading @@ -2,7 +2,8 @@ Qualcomm Technologies, Inc. Sensor Clock Controller Bindings Required properties: - compatible: shall contain "qcom,scc-sm8150" or "qcom,scc-sm8150-v2" or "qcom,scc-sm6150" or "qcom,scc-sa6155" or "qcom,scc-sa8195". "qcom,scc-sm6150" or "qcom,scc-sa6155" or "qcom,scc-sa8195" or "qcom,scc-sa8155" or "qcom,scc-sa8155-v2". - reg: shall contain base register location and length. - vdd_scc_cx-supply: the logic rail supply. - #clock-cells: shall contain 1. Loading
drivers/clk/qcom/scc-sm8150.c +25 −1 Original line number Diff line number Diff line Loading @@ -576,11 +576,28 @@ static const struct qcom_cc_desc scc_sm8150_desc = { static const struct of_device_id scc_sm8150_match_table[] = { { .compatible = "qcom,scc-sm8150" }, { .compatible = "qcom,scc-sm8150-v2" }, { .compatible = "qcom,scc-sa8155" }, { .compatible = "qcom,scc-sa8155-v2" }, { .compatible = "qcom,scc-sa8195" }, { } }; MODULE_DEVICE_TABLE(of, scc_sm8150_match_table); static int scc_sa8155_resume(struct device *dev) { struct regmap *regmap = dev_get_drvdata(dev); /* Reconfigure the scc pll */ scc_pll.inited = false; clk_trion_pll_configure(&scc_pll, regmap, scc_pll.config); return 0; } static const struct dev_pm_ops scc_sa8155_pm_ops = { .restore_early = scc_sa8155_resume, }; static void scc_sa8195_fixup(struct platform_device *pdev) { if (of_device_is_compatible(pdev->dev.of_node, "qcom,scc-sa8195")) { Loading Loading @@ -645,9 +662,16 @@ static int scc_sm8150_fixup(struct platform_device *pdev, struct regmap *regmap) return -EINVAL; if (!strcmp(compat, "qcom,scc-sm8150-v2") || !strcmp(compat, "qcom,scc-sa8195")) !strcmp(compat, "qcom,scc-sa8195") || !strcmp(compat, "qcom,scc-sa8155-v2")) scc_sm8150_fixup_sm8150v2(regmap); if (!strcmp(compat, "qcom,scc-sa8155") || !strcmp(compat, "qcom,scc-sa8155-v2")) { pdev->dev.driver->pm = &scc_sa8155_pm_ops; dev_set_drvdata(&pdev->dev, regmap); } return 0; } Loading