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Commit 8854695a authored by Andrey Grodzovsky's avatar Andrey Grodzovsky Committed by Alex Deucher
Browse files

drm/amdgpu: Simplify amdgpu_lockup_timeout usage.



With introduction of amdgpu_gpu_recovery we don't need any more
to rely on amdgpu_lockup_timeout == 0 for disabling GPU reset.

Signed-off-by: default avatarAndrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent dcebf026
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+6 −1
Original line number Diff line number Diff line
@@ -1229,6 +1229,11 @@ static void amdgpu_check_arguments(struct amdgpu_device *adev)
			 amdgpu_vram_page_split);
		amdgpu_vram_page_split = 1024;
	}

	if (amdgpu_lockup_timeout == 0) {
		dev_warn(adev->dev, "lockup_timeout msut be > 0, adjusting to 10000\n");
		amdgpu_lockup_timeout = 10000;
	}
}

/**
@@ -2827,7 +2832,7 @@ bool amdgpu_need_backup(struct amdgpu_device *adev)
	if (adev->flags & AMD_IS_APU)
		return false;

	return amdgpu_lockup_timeout > 0 ? true : false;
	return amdgpu_gpu_recovery;
}

static int amdgpu_recover_vram_from_shadow(struct amdgpu_device *adev,
+2 −2
Original line number Diff line number Diff line
@@ -90,7 +90,7 @@ int amdgpu_disp_priority = 0;
int amdgpu_hw_i2c = 0;
int amdgpu_pcie_gen2 = -1;
int amdgpu_msi = -1;
int amdgpu_lockup_timeout = 0;
int amdgpu_lockup_timeout = 10000;
int amdgpu_dpm = -1;
int amdgpu_fw_load_type = -1;
int amdgpu_aspm = -1;
@@ -166,7 +166,7 @@ module_param_named(pcie_gen2, amdgpu_pcie_gen2, int, 0444);
MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
module_param_named(msi, amdgpu_msi, int, 0444);

MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (default 0 = disable)");
MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms > 0 (default 10000)");
module_param_named(lockup_timeout, amdgpu_lockup_timeout, int, 0444);

MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)");
+1 −13
Original line number Diff line number Diff line
@@ -410,7 +410,6 @@ int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring,
int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring,
				  unsigned num_hw_submission)
{
	long timeout;
	int r;

	/* Check that num_hw_submission is a power of two */
@@ -434,20 +433,9 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring,

	/* No need to setup the GPU scheduler for KIQ ring */
	if (ring->funcs->type != AMDGPU_RING_TYPE_KIQ) {
		timeout = msecs_to_jiffies(amdgpu_lockup_timeout);
		if (timeout == 0) {
			/*
			 * FIXME:
			 * Delayed workqueue cannot use it directly,
			 * so the scheduler will not use delayed workqueue if
			 * MAX_SCHEDULE_TIMEOUT is set.
			 * Currently keep it simple and silly.
			 */
			timeout = MAX_SCHEDULE_TIMEOUT;
		}
		r = drm_sched_init(&ring->sched, &amdgpu_sched_ops,
				   num_hw_submission, amdgpu_job_hang_limit,
				   timeout, ring->name);
				   msecs_to_jiffies(amdgpu_lockup_timeout), ring->name);
		if (r) {
			DRM_ERROR("Failed to create scheduler on ring %s.\n",
				  ring->name);
+1 −1
Original line number Diff line number Diff line
@@ -277,7 +277,7 @@ static int xgpu_ai_mailbox_rcv_irq(struct amdgpu_device *adev,
	int r;

	/* trigger gpu-reset by hypervisor only if TDR disbaled */
	if (amdgpu_lockup_timeout == 0) {
	if (!amdgpu_gpu_recovery) {
		/* see what event we get */
		r = xgpu_ai_mailbox_rcv_msg(adev, IDH_FLR_NOTIFICATION);

+1 −1
Original line number Diff line number Diff line
@@ -545,7 +545,7 @@ static int xgpu_vi_mailbox_rcv_irq(struct amdgpu_device *adev,
	int r;

	/* trigger gpu-reset by hypervisor only if TDR disbaled */
	if (amdgpu_lockup_timeout == 0) {
	if (!amdgpu_gpu_recovery) {
		/* see what event we get */
		r = xgpu_vi_mailbox_rcv_msg(adev, IDH_FLR_NOTIFICATION);