Loading Documentation/devicetree/bindings/drm/msm/sde-dp-sim.txt +27 −0 Original line number Diff line number Diff line Loading @@ -3,7 +3,34 @@ QTI Snapdragon Display Engine (SDE) DP-MST sideband message emulation driver Required properties: - compatible: "qcom,dp-mst-sim" Optional properties: - qcom,dpcd-max-rate: A u32 property defines dpcd reg 0x1. - qcom,dpcd-max-lane: A u32 property defines dpcd reg 0x2. - qcom,dpcd-mst: A u32 property defines dpcd reg 0x21. - qcom,dpcd-regs: A <addr,val> array property defines dpcd reg addr and val. - qcom,voltage-swing: A u32 property that overwrite dpcd reg 0x103~0x106. - qcom,pre-emphasis: A u32 property that overwrite dpcd reg 0x103~0x106. - qcom,link-training-cnt: A u32 property defines physical link training cnt before switching to simulation mode. - qcom,skip-edid: A boolean property defines if edid will read from internal edid buffer. - qcom,skip-dpcd-read: A boolean property defines if dpcd will read from internal dpcd buffer. - qcom,skip-link-training: A boolean property defines if link training will be skipped. - qcom,skip-dpcd-write: A boolean property defines if dpcd write will be ignored. - qcom,skip-hpd: A boolean property defines if HPD will be ignored and always set high. - qcom,skip-mst: A boolean property defines if MST sideband message need to be simulated. Each child node represents a port at root branch, with properties: - qcom,edid: A u8 array property defines EDID raw data. Once defined, below properties will be ignored. For any mode with horizontal width > 4095, only EDID raw data format is supported. - qcom,mode-h-active: A u32 property defines the horizontal active size. - qcom,mode-h-front-porch: A u32 property defines the horizontal front porch. - qcom,mode-h-pulse-width: A u32 property defines the horizontal pulse. Loading Documentation/devicetree/bindings/drm/msm/sde-dp.txt +5 −0 Original line number Diff line number Diff line Loading @@ -121,6 +121,11 @@ Optional properties: - qcom,dp-aux-bridge: phandle for dp aux bridge module, for 3rd party dp bridge only. - qcom,dp-aux-bridge-sim: phandle for dp aux bridge module, for internal mst debug simulation only. - qcom,dp-force-bond-mode: Ignore tile information from EDID and force DP to work in bond mode. - qcom,dp-force-connect-mode: Boolean to specify if dp is in always-connected mode, only set when qcom,dp-aux-bridge is defined. Once set, dp will always report connected state to user. When HPD is high, mode from sink will be reported. When HPD is low, mode from dp-aux-bridge simulator will be reported. - qcom,bond-dual-ctrl: u32 array to specify the cell-index of the two DP controllers that support bond mode. The first controller in the array is the bond master. Driver will switch to bond mode if both DP controllers are connected to the same dual DP input monitor. Loading drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.c +3 −3 Original line number Diff line number Diff line Loading @@ -2632,8 +2632,7 @@ void dsi_ctrl_disable_status_interrupt(struct dsi_ctrl *dsi_ctrl, { unsigned long flags; if (!dsi_ctrl || dsi_ctrl->irq_info.irq_num == -1 || intr_idx >= DSI_STATUS_INTERRUPT_COUNT) if (!dsi_ctrl || intr_idx >= DSI_STATUS_INTERRUPT_COUNT) return; spin_lock_irqsave(&dsi_ctrl->irq_info.irq_lock, flags); Loading @@ -2645,7 +2644,8 @@ void dsi_ctrl_disable_status_interrupt(struct dsi_ctrl *dsi_ctrl, dsi_ctrl->irq_info.irq_stat_mask); /* don't need irq if no lines are enabled */ if (dsi_ctrl->irq_info.irq_stat_mask == 0) if (dsi_ctrl->irq_info.irq_stat_mask == 0 && dsi_ctrl->irq_info.irq_num != -1) disable_irq_nosync(dsi_ctrl->irq_info.irq_num); } Loading Loading
Documentation/devicetree/bindings/drm/msm/sde-dp-sim.txt +27 −0 Original line number Diff line number Diff line Loading @@ -3,7 +3,34 @@ QTI Snapdragon Display Engine (SDE) DP-MST sideband message emulation driver Required properties: - compatible: "qcom,dp-mst-sim" Optional properties: - qcom,dpcd-max-rate: A u32 property defines dpcd reg 0x1. - qcom,dpcd-max-lane: A u32 property defines dpcd reg 0x2. - qcom,dpcd-mst: A u32 property defines dpcd reg 0x21. - qcom,dpcd-regs: A <addr,val> array property defines dpcd reg addr and val. - qcom,voltage-swing: A u32 property that overwrite dpcd reg 0x103~0x106. - qcom,pre-emphasis: A u32 property that overwrite dpcd reg 0x103~0x106. - qcom,link-training-cnt: A u32 property defines physical link training cnt before switching to simulation mode. - qcom,skip-edid: A boolean property defines if edid will read from internal edid buffer. - qcom,skip-dpcd-read: A boolean property defines if dpcd will read from internal dpcd buffer. - qcom,skip-link-training: A boolean property defines if link training will be skipped. - qcom,skip-dpcd-write: A boolean property defines if dpcd write will be ignored. - qcom,skip-hpd: A boolean property defines if HPD will be ignored and always set high. - qcom,skip-mst: A boolean property defines if MST sideband message need to be simulated. Each child node represents a port at root branch, with properties: - qcom,edid: A u8 array property defines EDID raw data. Once defined, below properties will be ignored. For any mode with horizontal width > 4095, only EDID raw data format is supported. - qcom,mode-h-active: A u32 property defines the horizontal active size. - qcom,mode-h-front-porch: A u32 property defines the horizontal front porch. - qcom,mode-h-pulse-width: A u32 property defines the horizontal pulse. Loading
Documentation/devicetree/bindings/drm/msm/sde-dp.txt +5 −0 Original line number Diff line number Diff line Loading @@ -121,6 +121,11 @@ Optional properties: - qcom,dp-aux-bridge: phandle for dp aux bridge module, for 3rd party dp bridge only. - qcom,dp-aux-bridge-sim: phandle for dp aux bridge module, for internal mst debug simulation only. - qcom,dp-force-bond-mode: Ignore tile information from EDID and force DP to work in bond mode. - qcom,dp-force-connect-mode: Boolean to specify if dp is in always-connected mode, only set when qcom,dp-aux-bridge is defined. Once set, dp will always report connected state to user. When HPD is high, mode from sink will be reported. When HPD is low, mode from dp-aux-bridge simulator will be reported. - qcom,bond-dual-ctrl: u32 array to specify the cell-index of the two DP controllers that support bond mode. The first controller in the array is the bond master. Driver will switch to bond mode if both DP controllers are connected to the same dual DP input monitor. Loading
drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.c +3 −3 Original line number Diff line number Diff line Loading @@ -2632,8 +2632,7 @@ void dsi_ctrl_disable_status_interrupt(struct dsi_ctrl *dsi_ctrl, { unsigned long flags; if (!dsi_ctrl || dsi_ctrl->irq_info.irq_num == -1 || intr_idx >= DSI_STATUS_INTERRUPT_COUNT) if (!dsi_ctrl || intr_idx >= DSI_STATUS_INTERRUPT_COUNT) return; spin_lock_irqsave(&dsi_ctrl->irq_info.irq_lock, flags); Loading @@ -2645,7 +2644,8 @@ void dsi_ctrl_disable_status_interrupt(struct dsi_ctrl *dsi_ctrl, dsi_ctrl->irq_info.irq_stat_mask); /* don't need irq if no lines are enabled */ if (dsi_ctrl->irq_info.irq_stat_mask == 0) if (dsi_ctrl->irq_info.irq_stat_mask == 0 && dsi_ctrl->irq_info.irq_num != -1) disable_irq_nosync(dsi_ctrl->irq_info.irq_num); } Loading