drm/msm/dsi-staging: add support to set continuous clock through phy

Adds support to configure DSI controller and phy to force the clock
lane to HS mode always for phy ver 4.0.

Change-Id: Ie49f1b3f2239adcf7113189e7159bcbbb1c8ab14
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>