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Commit 84eb04f6 authored by Colin Xu's avatar Colin Xu Committed by Zhenyu Wang
Browse files

drm/i915/gvt: Enable dma_buf support for BXT. 



Handle dma_buf on BXT as SKL and KBL.

Signed-off-by: default avatarColin Xu <colin.xu@intel.com>
Signed-off-by: default avatarZhenyu Wang <zhenyuw@linux.intel.com>
parent 72bad997

drivers/gpu/drm/i915/gvt/dmabuf.c

+3 −1
Original line number Original line Diff line number Diff line
@@ -164,7 +164,9 @@ static struct drm_i915_gem_object *vgpu_create_gem(struct drm_device *dev, 




	obj->read_domains = I915_GEM_DOMAIN_GTT;

	obj->read_domains = I915_GEM_DOMAIN_GTT;

	obj->write_domain = 0;

	obj->write_domain = 0;

	if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) {

	if (IS_SKYLAKE(dev_priv)

		|| IS_KABYLAKE(dev_priv)

		|| IS_BROXTON(dev_priv)) {

		unsigned int tiling_mode = 0;

		unsigned int tiling_mode = 0;

		unsigned int stride = 0;

		unsigned int stride = 0;

drivers/gpu/drm/i915/gvt/fb_decoder.c

+9 −3
Original line number Original line Diff line number Diff line
@@ -151,7 +151,9 @@ static u32 intel_vgpu_get_stride(struct intel_vgpu *vgpu, int pipe, 
	u32 stride_reg = vgpu_vreg_t(vgpu, DSPSTRIDE(pipe)) & stride_mask;

	u32 stride_reg = vgpu_vreg_t(vgpu, DSPSTRIDE(pipe)) & stride_mask;

	u32 stride = stride_reg;

	u32 stride = stride_reg;





	if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) {

	if (IS_SKYLAKE(dev_priv)

		|| IS_KABYLAKE(dev_priv)

		|| IS_BROXTON(dev_priv)) {

		switch (tiled) {

		switch (tiled) {

		case PLANE_CTL_TILED_LINEAR:

		case PLANE_CTL_TILED_LINEAR:

			stride = stride_reg * 64;

			stride = stride_reg * 64;
@@ -215,7 +217,9 @@ int intel_vgpu_decode_primary_plane(struct intel_vgpu *vgpu, 
	if (!plane->enabled)

	if (!plane->enabled)

		return -ENODEV;

		return -ENODEV;





	if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) {

	if (IS_SKYLAKE(dev_priv)

		|| IS_KABYLAKE(dev_priv)

		|| IS_BROXTON(dev_priv)) {

		plane->tiled = (val & PLANE_CTL_TILED_MASK) >>

		plane->tiled = (val & PLANE_CTL_TILED_MASK) >>

		_PLANE_CTL_TILED_SHIFT;

		_PLANE_CTL_TILED_SHIFT;

		fmt = skl_format_to_drm(

		fmt = skl_format_to_drm(
@@ -257,7 +261,9 @@ int intel_vgpu_decode_primary_plane(struct intel_vgpu *vgpu, 
	}

	}





	plane->stride = intel_vgpu_get_stride(vgpu, pipe, (plane->tiled << 10),

	plane->stride = intel_vgpu_get_stride(vgpu, pipe, (plane->tiled << 10),

		(IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) ?

		(IS_SKYLAKE(dev_priv)

		|| IS_KABYLAKE(dev_priv)

		|| IS_BROXTON(dev_priv)) ?

			(_PRI_PLANE_STRIDE_MASK >> 6) :

			(_PRI_PLANE_STRIDE_MASK >> 6) :

				_PRI_PLANE_STRIDE_MASK, plane->bpp);

				_PRI_PLANE_STRIDE_MASK, plane->bpp);