Commit 84e65b0a authored Jul 04, 2008 by Richard Kennedy Committed by Ingo Molnar Jul 04, 2008

x86: cacheline_align tss_struct



The manual padding to align on cacheline size only worked in 32 bit
In 64 bit the structure was not aligned and contained wasted space.

use the compiler ____cachline_aligned to save space & properly align
this structure.

x86_64_default size goes from 9136 -> 8960
x86_64_AMD     size goes from 9136 -> 8896

built & running on 2.6.26-rc8.

Signed-off-by: Richard Kennedy <richard@rsk.demon.co.uk>
Signed-off-by: Ingo Molnar <mingo@elte.hu>

parent 95c60b08

include/asm-x86/processor.h

+1 −5

Original line number	Diff line number	Diff line
		@@ -262,16 +262,12 @@ struct tss_struct {
		unsigned long io_bitmap_max;
		struct thread_struct *io_bitmap_owner;

		/*
		* Pad the TSS to be cacheline-aligned (size is 0x100):
		*/
		unsigned long __cacheline_filler[35];
		/*
		* .. and then another 0x100 bytes for the emergency kernel stack:
		*/
		unsigned long stack[64];

		} __attribute__((packed));
		} ____cacheline_aligned;

		DECLARE_PER_CPU(struct tss_struct, init_tss);