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Commit 8465baae authored by Weiyi Lu's avatar Weiyi Lu Committed by Stephen Boyd
Browse files

dt-bindings: clock: add clocks for MT2712 



add new clocks according to ECO design change

Signed-off-by: default avatarWeiyi Lu <weiyi.lu@mediatek.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent 7928b2cb

include/dt-bindings/clock/mt2712-clk.h

+10 −2
Original line number Diff line number Diff line
@@ -222,7 +222,13 @@ 
#define CLK_TOP_APLL_DIV_PDN5		183

#define CLK_TOP_APLL_DIV_PDN6		184

#define CLK_TOP_APLL_DIV_PDN7		185

#define CLK_TOP_NR_CLK			186

#define CLK_TOP_APLL1_D3		186

#define CLK_TOP_APLL1_REF_SEL		187

#define CLK_TOP_APLL2_REF_SEL		188

#define CLK_TOP_NFI2X_EN		189

#define CLK_TOP_NFIECC_EN		190

#define CLK_TOP_NFI1X_CK_EN		191

#define CLK_TOP_NR_CLK			192



/* INFRACFG */
@@ -281,7 +287,9 @@ 
#define CLK_PERI_MSDC30_3_EN		41

#define CLK_PERI_MSDC50_0_HCLK_EN	42

#define CLK_PERI_MSDC50_3_HCLK_EN	43

#define CLK_PERI_NR_CLK			44

#define CLK_PERI_MSDC30_0_QTR_EN	44

#define CLK_PERI_MSDC30_3_QTR_EN	45

#define CLK_PERI_NR_CLK			46



/* MCUCFG */