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Commit 80afe906 authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Add address base for swr on qcs405"

parents a9c997a2 8f04b542

arch/arm64/boot/dts/qcom/qcs405-lpi.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -249,7 +249,7 @@ 
			wsa_swr_clk_sleep: wsa_swr_clk_sleep {

				mux {

					pins = "gpio5";

					function = "wsa_clk";

					function = "func1";

				};



				config {
@@ -262,7 +262,7 @@ 
			wsa_swr_clk_active: wsa_swr_clk_active {

				mux {

					pins = "gpio5";

					function = "wsa_clk";

					function = "func1";

				};



				config {
@@ -277,7 +277,7 @@ 
			wsa_swr_data_sleep: wsa_swr_data_sleep {

				mux {

					pins = "gpio20";

					function = "wsa_data";

					function = "func1";

				};



				config {
@@ -290,7 +290,7 @@ 
			wsa_swr_data_active: wsa_swr_data_active {

				mux {

					pins = "gpio20";

					function = "wsa_data";

					function = "func1";

				};



				config {

arch/arm64/boot/dts/qcom/qcs405-wsa-bolero.dtsi

+3 −3
Original line number Diff line number Diff line
@@ -17,14 +17,14 @@ 
		clock-names = "wsa_core_clk", "wsa_npl_clk";

		clocks = <&clock_audio_wsa_1 0>,

		<&clock_audio_wsa_2 0>;

		qcom,wsa-swr-gpios = &wsa_swr_gpios;

		qcom,wsa-swr-gpios = <&wsa_swr_gpios>;

	};

};



&soc {

	clock_audio_wsa_1: wsa_core_clk {

		compatible = "qcom,audio-ref-clk";

		qcom,codec-ext-clk-src = <2>;

		qcom,codec-ext-clk-src = <3>;

		qcom,codec-lpass-ext-clk-freq = <19200000>;

		qcom,codec-lpass-clk-id = <0x309>;

		#clock-cells = <1>;
@@ -32,7 +32,7 @@ 


	clock_audio_wsa_2: wsa_npl_clk {

		compatible = "qcom,audio-ref-clk";

		qcom,codec-ext-clk-src = <2>;

		qcom,codec-ext-clk-src = <4>;

		qcom,codec-lpass-ext-clk-freq = <19200000>;

		qcom,codec-lpass-clk-id = <0x30A>;

		#clock-cells = <1>;

arch/arm64/boot/dts/qcom/qcs405-wsa881x.dtsi

+10 −6
Original line number Diff line number Diff line
@@ -23,12 +23,16 @@ 
		compatible = "qcom,swr-mstr";

		#address-cells = <2>;

		#size-cells = <0>;

		swrm-io-base = <0x0C2D0000 0x0>;

		interrupts = <0 294 0>;

		interrupt-names = "swr_master_irq";

		qcom,swr-num-ports = <8>;

		qcom,swr-port-mapping = <1 SPKR_L 0x1>,

			<2 SPKR_L_COMP 0xF>, <3 SPKR_L_BOOST 0x3>,

			<4 SPKR_R 0x1>, <5 SPKR_R_COMP 0xF>,

			<6 SPKR_R_BOOST 0x3>, <7 SPKR_L_VI 0x3>,

			<8 SPKR_R_VI 0x3>;

		qcom,swr-num-dev = <2>;



		wsa881x_0211: wsa881x@20170211 {

			compatible = "qcom,wsa881x";