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Commit 7e3e375c authored by Sudarsana Reddy Kalluru's avatar Sudarsana Reddy Kalluru Committed by David S. Miller
Browse files

qed: Add missing device config for RoCE EDPM in UFP mode. 



This patch adds support to configure the DORQ to use vlan-id/priority for
roce EDPM.

Fixes: cac6f691 ("qed: Add support for Unified Fabric Port")
Signed-off-by: default avatarSudarsana Reddy Kalluru <Sudarsana.Kalluru@cavium.com>
Signed-off-by: default avatarTomer Tayar <Tomer.Tayar@cavium.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 0216da94

drivers/net/ethernet/qlogic/qed/qed_dcbx.c

+22 −18
Original line number Diff line number Diff line
@@ -190,11 +190,8 @@ qed_dcbx_dp_protocol(struct qed_hwfn *p_hwfn, struct qed_dcbx_results *p_data) 


static void

qed_dcbx_set_params(struct qed_dcbx_results *p_data,

		    struct qed_hwfn *p_hwfn,

		    struct qed_hw_info *p_info,

		    bool enable,

		    u8 prio,

		    u8 tc,

		    struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,

		    bool enable, u8 prio, u8 tc,

		    enum dcbx_protocol_type type,

		    enum qed_pci_personality personality)

{
@@ -213,18 +210,24 @@ qed_dcbx_set_params(struct qed_dcbx_results *p_data, 
		p_data->arr[type].dont_add_vlan0 = true;



	/* QM reconf data */

	if (p_info->personality == personality)

		qed_hw_info_set_offload_tc(p_info, tc);

	if (p_hwfn->hw_info.personality == personality)

		qed_hw_info_set_offload_tc(&p_hwfn->hw_info, tc);



	/* Configure dcbx vlan priority in doorbell block for roce EDPM */

	if (test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits) &&

	    type == DCBX_PROTOCOL_ROCE) {

		qed_wr(p_hwfn, p_ptt, DORQ_REG_TAG1_OVRD_MODE, 1);

		qed_wr(p_hwfn, p_ptt, DORQ_REG_PF_PCP_BB_K2, prio << 1);

	}

}



/* Update app protocol data and hw_info fields with the TLV info */

static void

qed_dcbx_update_app_info(struct qed_dcbx_results *p_data,

			 struct qed_hwfn *p_hwfn,

			 bool enable,

			 u8 prio, u8 tc, enum dcbx_protocol_type type)

			 struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,

			 bool enable, u8 prio, u8 tc,

			 enum dcbx_protocol_type type)

{

	struct qed_hw_info *p_info = &p_hwfn->hw_info;

	enum qed_pci_personality personality;

	enum dcbx_protocol_type id;

	int i;
@@ -237,7 +240,7 @@ qed_dcbx_update_app_info(struct qed_dcbx_results *p_data, 


		personality = qed_dcbx_app_update[i].personality;



		qed_dcbx_set_params(p_data, p_hwfn, p_info, enable,

		qed_dcbx_set_params(p_data, p_hwfn, p_ptt, enable,

				    prio, tc, type, personality);

	}

}
@@ -271,7 +274,7 @@ qed_dcbx_get_app_protocol_type(struct qed_hwfn *p_hwfn, 
 * reconfiguring QM. Get protocol specific data for PF update ramrod command.

 */

static int

qed_dcbx_process_tlv(struct qed_hwfn *p_hwfn,

qed_dcbx_process_tlv(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,

		     struct qed_dcbx_results *p_data,

		     struct dcbx_app_priority_entry *p_tbl,

		     u32 pri_tc_tbl, int count, u8 dcbx_version)
@@ -315,7 +318,7 @@ qed_dcbx_process_tlv(struct qed_hwfn *p_hwfn, 
				enable = true;

			}



			qed_dcbx_update_app_info(p_data, p_hwfn, enable,

			qed_dcbx_update_app_info(p_data, p_hwfn, p_ptt, enable,

						 priority, tc, type);

		}

	}
@@ -337,7 +340,7 @@ qed_dcbx_process_tlv(struct qed_hwfn *p_hwfn, 
			continue;



		enable = (type == DCBX_PROTOCOL_ETH) ? false : !!dcbx_version;

		qed_dcbx_update_app_info(p_data, p_hwfn, enable,

		qed_dcbx_update_app_info(p_data, p_hwfn, p_ptt, enable,

					 priority, tc, type);

	}
@@ -347,7 +350,8 @@ qed_dcbx_process_tlv(struct qed_hwfn *p_hwfn, 
/* Parse app TLV's to update TC information in hw_info structure for

 * reconfiguring QM. Get protocol specific data for PF update ramrod command.

 */

static int qed_dcbx_process_mib_info(struct qed_hwfn *p_hwfn)

static int

qed_dcbx_process_mib_info(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)

{

	struct dcbx_app_priority_feature *p_app;

	struct dcbx_app_priority_entry *p_tbl;
@@ -371,7 +375,7 @@ static int qed_dcbx_process_mib_info(struct qed_hwfn *p_hwfn) 
	p_info = &p_hwfn->hw_info;

	num_entries = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_NUM_ENTRIES);



	rc = qed_dcbx_process_tlv(p_hwfn, &data, p_tbl, pri_tc_tbl,

	rc = qed_dcbx_process_tlv(p_hwfn, p_ptt, &data, p_tbl, pri_tc_tbl,

				  num_entries, dcbx_version);

	if (rc)

		return rc;
@@ -897,7 +901,7 @@ qed_dcbx_mib_update_event(struct qed_hwfn *p_hwfn, 
		return rc;



	if (type == QED_DCBX_OPERATIONAL_MIB) {

		rc = qed_dcbx_process_mib_info(p_hwfn);

		rc = qed_dcbx_process_mib_info(p_hwfn, p_ptt);

		if (!rc) {

			/* reconfigure tcs of QM queues according

			 * to negotiation results

drivers/net/ethernet/qlogic/qed/qed_mcp.c

+20 −4
Original line number Diff line number Diff line
@@ -1581,13 +1581,29 @@ static void qed_mcp_update_stag(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 
	p_hwfn->mcp_info->func_info.ovlan = (u16)shmem_info.ovlan_stag &

						 FUNC_MF_CFG_OV_STAG_MASK;

	p_hwfn->hw_info.ovlan = p_hwfn->mcp_info->func_info.ovlan;

	if ((p_hwfn->hw_info.hw_mode & BIT(MODE_MF_SD)) &&

	    (p_hwfn->hw_info.ovlan != QED_MCP_VLAN_UNSET)) {

		qed_wr(p_hwfn, p_ptt,

		       NIG_REG_LLH_FUNC_TAG_VALUE, p_hwfn->hw_info.ovlan);

	if (test_bit(QED_MF_OVLAN_CLSS, &p_hwfn->cdev->mf_bits)) {

		if (p_hwfn->hw_info.ovlan != QED_MCP_VLAN_UNSET) {

			qed_wr(p_hwfn, p_ptt, NIG_REG_LLH_FUNC_TAG_VALUE,

			       p_hwfn->hw_info.ovlan);

			qed_wr(p_hwfn, p_ptt, NIG_REG_LLH_FUNC_TAG_EN, 1);



			/* Configure DB to add external vlan to EDPM packets */

			qed_wr(p_hwfn, p_ptt, DORQ_REG_TAG1_OVRD_MODE, 1);

			qed_wr(p_hwfn, p_ptt, DORQ_REG_PF_EXT_VID_BB_K2,

			       p_hwfn->hw_info.ovlan);

		} else {

			qed_wr(p_hwfn, p_ptt, NIG_REG_LLH_FUNC_TAG_EN, 0);

			qed_wr(p_hwfn, p_ptt, NIG_REG_LLH_FUNC_TAG_VALUE, 0);

			qed_wr(p_hwfn, p_ptt, DORQ_REG_TAG1_OVRD_MODE, 0);

			qed_wr(p_hwfn, p_ptt, DORQ_REG_PF_EXT_VID_BB_K2, 0);

		}



		qed_sp_pf_update_stag(p_hwfn);

	}



	DP_VERBOSE(p_hwfn, QED_MSG_SP, "ovlan  = %d hw_mode = 0x%x\n",

		   p_hwfn->mcp_info->func_info.ovlan, p_hwfn->hw_info.hw_mode);



	/* Acknowledge the MFW */

	qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_S_TAG_UPDATE_ACK, 0,

		    &resp, &param);

drivers/net/ethernet/qlogic/qed/qed_reg_addr.h

+6 −0
Original line number Diff line number Diff line
@@ -216,6 +216,12 @@ 
	0x00c000UL

#define  DORQ_REG_IFEN \

	0x100040UL

#define DORQ_REG_TAG1_OVRD_MODE \

	0x1008b4UL

#define DORQ_REG_PF_PCP_BB_K2 \

	0x1008c4UL

#define DORQ_REG_PF_EXT_VID_BB_K2 \

	0x1008c8UL

#define DORQ_REG_DB_DROP_REASON \

	0x100a2cUL

#define DORQ_REG_DB_DROP_DETAILS \