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Commit 7d29d1f8 authored by Bhuvan Varshney's avatar Bhuvan Varshney Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: Add NFC device node for SM6150



Device node changes required on SM6150 describing
the GPIO configuration for Nfc controller chip.

Modified corresponding Nfc device node for
QRD and IDP platforms.

Change-Id: I0ff4fcf8c7ab1a8b0b41c7d18db623a2c580f258
Signed-off-by: default avatarBhuvan Varshney <bvarshne@codeaurora.org>
parent d8f81fe4
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+21 −0
Original line number Diff line number Diff line
@@ -122,6 +122,27 @@
	};
};

&qupv3_se5_i2c {
	status = "ok";
	qcom,clk-freq-out = <1000000>;
	nq@28 {
		compatible = "qcom,nq-nci";
		reg = <0x28>;
		qcom,nq-irq = <&tlmm 86 0x00>;
		qcom,nq-ven = <&tlmm 84 0x00>;
		qcom,nq-firm = <&tlmm 85 0x00>;
		qcom,nq-clkreq = <&tlmm 50 0x00>;
		interrupt-parent = <&tlmm>;
		interrupts = <86 0>;
		interrupt-names = "nfc_irq";
		pinctrl-names = "nfc_active", "nfc_suspend";
		pinctrl-0 = <&nfc_int_active &nfc_enable_active
				&nfc_clk_req_active>;
		pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend
				&nfc_clk_req_suspend>;
	};
};

&sdhc_1 {
	vdd-supply = <&pm6150l_l11>;
	qcom,vdd-voltage-level = <2950000 2950000>;
+92 −0
Original line number Diff line number Diff line
@@ -308,6 +308,98 @@
			};
		};

		nfc {
			nfc_int_active: nfc_int_active {
				/* active state */
				mux {
					/* GPIO 86 NFC Read Interrupt */
					pins = "gpio86";
					function = "gpio";
				};

				config {
					pins = "gpio86";
					drive-strength = <2>; /* 2 MA */
					bias-pull-up;
				};
			};

			nfc_int_suspend: nfc_int_suspend {
				/* sleep state */
				mux {
					/* GPIO 86 NFC Read Interrupt */
					pins = "gpio86";
					function = "gpio";
				};

				config {
					pins = "gpio86";
					drive-strength = <2>; /* 2 MA */
					bias-pull-up;
				};
			};

			nfc_enable_active: nfc_enable_active {
				/* active state */
				mux {
					/* 84: Enable 85: Firmware */
					pins = "gpio84", "gpio85";
					function = "gpio";
				};

				config {
					pins = "gpio84", "gpio85";
					drive-strength = <2>; /* 2 MA */
					bias-pull-up;
				};
			};

			nfc_enable_suspend: nfc_enable_suspend {
				/* sleep state */
				mux {
					/* 84: Enable 85: Firmware */
					pins = "gpio84", "gpio85";
					function = "gpio";
				};

				config {
					pins = "gpio84", "gpio85";
					drive-strength = <2>; /* 2 MA */
					bias-disable;
				};
			};

			nfc_clk_req_active: nfc_clk_req_active {
				/* active state */
				mux {
					/* GPIO 50: NFC CLOCK REQUEST */
					pins = "gpio50";
					function = "gpio";
				};

				config {
					pins = "gpio50";
					drive-strength = <2>; /* 2 MA */
					bias-pull-up;
				};
			};

			nfc_clk_req_suspend: nfc_clk_req_suspend {
				/* sleep state */
				mux {
					/* GPIO 50: NFC CLOCK REQUEST */
					pins = "gpio50";
					function = "gpio";
				};

				config {
					pins = "gpio50";
					drive-strength = <2>; /* 2 MA */
					bias-disable;
				};
			};
		};

		/* SE 6 pin mappings */
		qupv3_se6_i2c_pins: qupv3_se6_i2c_pins {
			qupv3_se6_i2c_active: qupv3_se6_i2c_active {
+21 −0
Original line number Diff line number Diff line
@@ -153,6 +153,27 @@
	};
};

&qupv3_se5_i2c {
	status = "ok";
	qcom,clk-freq-out = <1000000>;
	nq@28 {
		compatible = "qcom,nq-nci";
		reg = <0x28>;
		qcom,nq-irq = <&tlmm 86 0x00>;
		qcom,nq-ven = <&tlmm 84 0x00>;
		qcom,nq-firm = <&tlmm 85 0x00>;
		qcom,nq-clkreq = <&tlmm 50 0x00>;
		interrupt-parent = <&tlmm>;
		interrupts = <86 0>;
		interrupt-names = "nfc_irq";
		pinctrl-names = "nfc_active", "nfc_suspend";
		pinctrl-0 = <&nfc_int_active &nfc_enable_active
				&nfc_clk_req_active>;
		pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend
				&nfc_clk_req_suspend>;
	};
};

&dsi_hx83112a_truly_video {
	qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";