Loading arch/arm64/boot/dts/qcom/sm8150-v2.dtsi +144 −0 Original line number Diff line number Diff line Loading @@ -649,3 +649,147 @@ < 2649600 MHZ_TO_MBPS( 933, 16) >, < 3000000 MHZ_TO_MBPS(1000, 16) >; }; &usb_qmp_dp_phy { qcom,qmp-phy-init-seq = <USB3_DP_QSERDES_COM_SSC_EN_CENTER 0x01 0 USB3_DP_QSERDES_COM_SSC_PER1 0x31 0 USB3_DP_QSERDES_COM_SSC_PER2 0x01 0 USB3_DP_QSERDES_COM_SSC_STEP_SIZE1_MODE0 0xde 0 USB3_DP_QSERDES_COM_SSC_STEP_SIZE2_MODE0 0x07 0 USB3_DP_QSERDES_COM_SSC_STEP_SIZE1_MODE1 0xde 0 USB3_DP_QSERDES_COM_SSC_STEP_SIZE2_MODE1 0x07 0 USB3_DP_QSERDES_COM_SYSCLK_BUF_ENABLE 0x0a 0 USB3_DP_QSERDES_COM_CP_CTRL_MODE0 0x06 0 USB3_DP_QSERDES_COM_CP_CTRL_MODE1 0x06 0 USB3_DP_QSERDES_COM_PLL_RCTRL_MODE0 0x16 0 USB3_DP_QSERDES_COM_PLL_RCTRL_MODE1 0x16 0 USB3_DP_QSERDES_COM_PLL_CCTRL_MODE0 0x36 0 USB3_DP_QSERDES_COM_PLL_CCTRL_MODE1 0x36 0 USB3_DP_QSERDES_COM_SYSCLK_EN_SEL 0x1a 0 USB3_DP_QSERDES_COM_LOCK_CMP_EN 0x04 0 USB3_DP_QSERDES_COM_LOCK_CMP1_MODE0 0x14 0 USB3_DP_QSERDES_COM_LOCK_CMP2_MODE0 0x34 0 USB3_DP_QSERDES_COM_LOCK_CMP1_MODE1 0x34 0 USB3_DP_QSERDES_COM_LOCK_CMP2_MODE1 0x82 0 USB3_DP_QSERDES_COM_DEC_START_MODE0 0x82 0 USB3_DP_QSERDES_COM_DEC_START_MODE1 0x82 0 USB3_DP_QSERDES_COM_DIV_FRAC_START1_MODE0 0xab 0 USB3_DP_QSERDES_COM_DIV_FRAC_START2_MODE0 0xea 0 USB3_DP_QSERDES_COM_DIV_FRAC_START3_MODE0 0x02 0 USB3_DP_QSERDES_COM_DIV_FRAC_START1_MODE1 0xab 0 USB3_DP_QSERDES_COM_DIV_FRAC_START2_MODE1 0xea 0 USB3_DP_QSERDES_COM_DIV_FRAC_START3_MODE1 0x02 0 USB3_DP_QSERDES_COM_VCO_TUNE1_MODE0 0x24 0 USB3_DP_QSERDES_COM_VCO_TUNE1_MODE1 0x24 0 USB3_DP_QSERDES_COM_VCO_TUNE2_MODE1 0x02 0 USB3_DP_QSERDES_COM_HSCLK_SEL 0x01 0 USB3_DP_QSERDES_COM_CORECLK_DIV_MODE1 0x08 0 USB3_DP_QSERDES_COM_SVS_MODE_CLK_SEL 0x2 0 USB3_DP_QSERDES_COM_BIN_VCOCAL_CMP_CODE1_MODE0 0xca 0 USB3_DP_QSERDES_COM_BIN_VCOCAL_CMP_CODE2_MODE0 0x1e 0 USB3_DP_QSERDES_COM_BIN_VCOCAL_CMP_CODE1_MODE1 0xca 0 USB3_DP_QSERDES_COM_BIN_VCOCAL_CMP_CODE2_MODE1 0x1e 0 USB3_DP_QSERDES_COM_BIN_VCOCAL_HSCLK_SEL 0x11 0 USB3_DP_QSERDES_COM_VCO_TUNE_MAP 0x02 0 USB3_DP_QSERDES_COM_CMN_IPTRIM 0x20 0 USB3_DP_QSERDES_TXA_LANE_MODE_1 0xd5 0 USB3_DP_QSERDES_TXA_RCV_DETECT_LVL_2 0x12 0 USB3_DP_QSERDES_TXA_RES_CODE_LANE_TX 0x00 0 USB3_DP_QSERDES_TXA_RES_CODE_LANE_RX 0x00 0 USB3_DP_QSERDES_TXA_RES_CODE_LANE_OFFSET_TX 0x16 0 USB3_DP_QSERDES_TXA_RES_CODE_LANE_OFFSET_RX 0x05 0 USB3_DP_QSERDES_TXA_PI_QEC_CTRL 0x20 0 USB3_DP_QSERDES_RXA_UCDR_SO_GAIN 0x04 0 USB3_DP_QSERDES_RXA_UCDR_FASTLOCK_FO_GAIN 0x2f 0 USB3_DP_QSERDES_RXA_UCDR_SO_SATURATION_AND_ENABLE 0x7f 0 USB3_DP_QSERDES_RXA_UCDR_FASTLOCK_COUNT_LOW 0xff 0 USB3_DP_QSERDES_RXA_UCDR_FASTLOCK_COUNT_HIGH 0x0f 0 USB3_DP_QSERDES_RXA_UCDR_PI_CONTROLS 0x99 0 USB3_DP_QSERDES_RXA_UCDR_SB2_THRESH1 0x04 0 USB3_DP_QSERDES_RXA_UCDR_SB2_THRESH2 0x08 0 USB3_DP_QSERDES_RXA_UCDR_SB2_GAIN1 0x05 0 USB3_DP_QSERDES_RXA_UCDR_SB2_GAIN2 0x05 0 USB3_DP_QSERDES_RXA_AUX_DATA_TCOARSE_TFINE 0xa0 0 USB3_DP_QSERDES_RXA_VGA_CAL_CNTRL1 0x54 0 USB3_DP_QSERDES_RXA_VGA_CAL_CNTRL2 0x0e 0 USB3_DP_QSERDES_RXA_GM_CAL 0x1f 0 USB3_DP_QSERDES_RXA_RX_EQU_ADAPTOR_CNTRL2 0x0f 0 USB3_DP_QSERDES_RXA_RX_EQU_ADAPTOR_CNTRL3 0x4a 0 USB3_DP_QSERDES_RXA_RX_EQU_ADAPTOR_CNTRL4 0x0a 0 USB3_DP_QSERDES_RXA_RX_IDAC_TSETTLE_LOW 0xc0 0 USB3_DP_QSERDES_RXA_RX_IDAC_TSETTLE_HIGH 0x00 0 USB3_DP_QSERDES_RXA_RX_EQ_OFFSET_ADAPTOR_CNTRL1 0x77 0 USB3_DP_QSERDES_RXA_RX_OFFSET_ADAPTOR_CNTRL2 0x80 0 USB3_DP_QSERDES_RXA_SIGDET_CNTRL 0x04 0 USB3_DP_QSERDES_RXA_SIGDET_DEGLITCH_CNTRL 0x0e 0 USB3_DP_QSERDES_RXA_RX_MODE_00_LOW 0xbf 0 USB3_DP_QSERDES_RXA_RX_MODE_00_HIGH 0xbf 0 USB3_DP_QSERDES_RXA_RX_MODE_00_HIGH2 0x3f 0 USB3_DP_QSERDES_RXA_RX_MODE_00_HIGH3 0x7f 0 USB3_DP_QSERDES_RXA_RX_MODE_00_HIGH4 0x94 0 USB3_DP_QSERDES_RXA_RX_MODE_01_LOW 0xdc 0 USB3_DP_QSERDES_RXA_RX_MODE_01_HIGH 0xdc 0 USB3_DP_QSERDES_RXA_RX_MODE_01_HIGH2 0x5c 0 USB3_DP_QSERDES_RXA_RX_MODE_01_HIGH3 0x0b 0 USB3_DP_QSERDES_RXA_RX_MODE_01_HIGH4 0xb3 0 USB3_DP_QSERDES_RXA_DFE_EN_TIMER 0x04 0 USB3_DP_QSERDES_RXA_DFE_CTLE_POST_CAL_OFFSET 0x38 0 USB3_DP_QSERDES_RXA_DCC_CTRL1 0xc 0 USB3_DP_QSERDES_RXA_VTH_CODE 0x10 0 USB3_DP_QSERDES_TXB_LANE_MODE_1 0xd5 0 USB3_DP_QSERDES_TXB_RCV_DETECT_LVL_2 0x12 0 USB3_DP_QSERDES_TXB_RES_CODE_LANE_TX 0x00 0 USB3_DP_QSERDES_TXB_RES_CODE_LANE_RX 0x00 0 USB3_DP_QSERDES_TXB_RES_CODE_LANE_OFFSET_TX 0x16 0 USB3_DP_QSERDES_TXB_RES_CODE_LANE_OFFSET_RX 0x05 0 USB3_DP_QSERDES_TXB_PI_QEC_CTRL 0x20 0 USB3_DP_QSERDES_RXB_UCDR_SO_GAIN 0x04 0 USB3_DP_QSERDES_RXB_UCDR_FASTLOCK_FO_GAIN 0x2f 0 USB3_DP_QSERDES_RXB_UCDR_SO_SATURATION_AND_ENABLE 0x7f 0 USB3_DP_QSERDES_RXB_UCDR_FASTLOCK_COUNT_LOW 0xff 0 USB3_DP_QSERDES_RXB_UCDR_FASTLOCK_COUNT_HIGH 0x0f 0 USB3_DP_QSERDES_RXB_UCDR_PI_CONTROLS 0x99 0 USB3_DP_QSERDES_RXB_UCDR_SB2_THRESH1 0x04 0 USB3_DP_QSERDES_RXB_UCDR_SB2_THRESH2 0x08 0 USB3_DP_QSERDES_RXB_UCDR_SB2_GAIN1 0x05 0 USB3_DP_QSERDES_RXB_UCDR_SB2_GAIN2 0x05 0 USB3_DP_QSERDES_RXB_AUX_DATA_TCOARSE_TFINE 0xa0 0 USB3_DP_QSERDES_RXB_VGA_CAL_CNTRL1 0x54 0 USB3_DP_QSERDES_RXB_VGA_CAL_CNTRL2 0x0e 0 USB3_DP_QSERDES_RXB_GM_CAL 0x1f 0 USB3_DP_QSERDES_RXB_RX_EQU_ADAPTOR_CNTRL2 0x0f 0 USB3_DP_QSERDES_RXB_RX_EQU_ADAPTOR_CNTRL3 0x4a 0 USB3_DP_QSERDES_RXB_RX_EQU_ADAPTOR_CNTRL4 0x0a 0 USB3_DP_QSERDES_RXB_RX_IDAC_TSETTLE_LOW 0xc0 0 USB3_DP_QSERDES_RXB_RX_IDAC_TSETTLE_HIGH 0x00 0 USB3_DP_QSERDES_RXB_RX_EQ_OFFSET_ADAPTOR_CNTRL1 0x77 0 USB3_DP_QSERDES_RXB_RX_OFFSET_ADAPTOR_CNTRL2 0x80 0 USB3_DP_QSERDES_RXB_SIGDET_CNTRL 0x04 0 USB3_DP_QSERDES_RXB_SIGDET_DEGLITCH_CNTRL 0x0e 0 USB3_DP_QSERDES_RXB_RX_MODE_00_LOW 0xbf 0 USB3_DP_QSERDES_RXB_RX_MODE_00_HIGH 0xbf 0 USB3_DP_QSERDES_RXB_RX_MODE_00_HIGH2 0x3f 0 USB3_DP_QSERDES_RXB_RX_MODE_00_HIGH3 0x7f 0 USB3_DP_QSERDES_RXB_RX_MODE_00_HIGH4 0x94 0 USB3_DP_QSERDES_RXB_RX_MODE_01_LOW 0xdc 0 USB3_DP_QSERDES_RXB_RX_MODE_01_HIGH 0xdc 0 USB3_DP_QSERDES_RXB_RX_MODE_01_HIGH2 0x5c 0 USB3_DP_QSERDES_RXB_RX_MODE_01_HIGH3 0x0b 0 USB3_DP_QSERDES_RXB_RX_MODE_01_HIGH4 0xb3 0 USB3_DP_QSERDES_RXB_DFE_EN_TIMER 0x04 0 USB3_DP_QSERDES_RXB_DFE_CTLE_POST_CAL_OFFSET 0x38 0 USB3_DP_QSERDES_RXB_DCC_CTRL1 0xc 0 USB3_DP_QSERDES_RXB_VTH_CODE 0x10 0 USB3_DP_PCS_LOCK_DETECT_CONFIG1 0xd0 0 USB3_DP_PCS_LOCK_DETECT_CONFIG2 0x17 0 USB3_DP_PCS_LOCK_DETECT_CONFIG3 0x20 0 USB3_DP_PCS_RX_SIGDET_LVL 0xaa 0 USB3_DP_PCS_ALIGN_DETECT_CONFIG1 0x88 0 USB3_DP_PCS_ALIGN_DETECT_CONFIG2 0x13 0 USB3_DP_PCS_EQ_CONFIG1 0x0d 0 USB3_DP_PCS_EQ_CONFIG5 0x50 0 USB3_DP_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL 0xf8 0 USB3_DP_PCS_USB3_RXEQTRAINING_DFE_TIME_S2 0x07 0 0xffffffff 0xffffffff 0x00>; }; Loading
arch/arm64/boot/dts/qcom/sm8150-v2.dtsi +144 −0 Original line number Diff line number Diff line Loading @@ -649,3 +649,147 @@ < 2649600 MHZ_TO_MBPS( 933, 16) >, < 3000000 MHZ_TO_MBPS(1000, 16) >; }; &usb_qmp_dp_phy { qcom,qmp-phy-init-seq = <USB3_DP_QSERDES_COM_SSC_EN_CENTER 0x01 0 USB3_DP_QSERDES_COM_SSC_PER1 0x31 0 USB3_DP_QSERDES_COM_SSC_PER2 0x01 0 USB3_DP_QSERDES_COM_SSC_STEP_SIZE1_MODE0 0xde 0 USB3_DP_QSERDES_COM_SSC_STEP_SIZE2_MODE0 0x07 0 USB3_DP_QSERDES_COM_SSC_STEP_SIZE1_MODE1 0xde 0 USB3_DP_QSERDES_COM_SSC_STEP_SIZE2_MODE1 0x07 0 USB3_DP_QSERDES_COM_SYSCLK_BUF_ENABLE 0x0a 0 USB3_DP_QSERDES_COM_CP_CTRL_MODE0 0x06 0 USB3_DP_QSERDES_COM_CP_CTRL_MODE1 0x06 0 USB3_DP_QSERDES_COM_PLL_RCTRL_MODE0 0x16 0 USB3_DP_QSERDES_COM_PLL_RCTRL_MODE1 0x16 0 USB3_DP_QSERDES_COM_PLL_CCTRL_MODE0 0x36 0 USB3_DP_QSERDES_COM_PLL_CCTRL_MODE1 0x36 0 USB3_DP_QSERDES_COM_SYSCLK_EN_SEL 0x1a 0 USB3_DP_QSERDES_COM_LOCK_CMP_EN 0x04 0 USB3_DP_QSERDES_COM_LOCK_CMP1_MODE0 0x14 0 USB3_DP_QSERDES_COM_LOCK_CMP2_MODE0 0x34 0 USB3_DP_QSERDES_COM_LOCK_CMP1_MODE1 0x34 0 USB3_DP_QSERDES_COM_LOCK_CMP2_MODE1 0x82 0 USB3_DP_QSERDES_COM_DEC_START_MODE0 0x82 0 USB3_DP_QSERDES_COM_DEC_START_MODE1 0x82 0 USB3_DP_QSERDES_COM_DIV_FRAC_START1_MODE0 0xab 0 USB3_DP_QSERDES_COM_DIV_FRAC_START2_MODE0 0xea 0 USB3_DP_QSERDES_COM_DIV_FRAC_START3_MODE0 0x02 0 USB3_DP_QSERDES_COM_DIV_FRAC_START1_MODE1 0xab 0 USB3_DP_QSERDES_COM_DIV_FRAC_START2_MODE1 0xea 0 USB3_DP_QSERDES_COM_DIV_FRAC_START3_MODE1 0x02 0 USB3_DP_QSERDES_COM_VCO_TUNE1_MODE0 0x24 0 USB3_DP_QSERDES_COM_VCO_TUNE1_MODE1 0x24 0 USB3_DP_QSERDES_COM_VCO_TUNE2_MODE1 0x02 0 USB3_DP_QSERDES_COM_HSCLK_SEL 0x01 0 USB3_DP_QSERDES_COM_CORECLK_DIV_MODE1 0x08 0 USB3_DP_QSERDES_COM_SVS_MODE_CLK_SEL 0x2 0 USB3_DP_QSERDES_COM_BIN_VCOCAL_CMP_CODE1_MODE0 0xca 0 USB3_DP_QSERDES_COM_BIN_VCOCAL_CMP_CODE2_MODE0 0x1e 0 USB3_DP_QSERDES_COM_BIN_VCOCAL_CMP_CODE1_MODE1 0xca 0 USB3_DP_QSERDES_COM_BIN_VCOCAL_CMP_CODE2_MODE1 0x1e 0 USB3_DP_QSERDES_COM_BIN_VCOCAL_HSCLK_SEL 0x11 0 USB3_DP_QSERDES_COM_VCO_TUNE_MAP 0x02 0 USB3_DP_QSERDES_COM_CMN_IPTRIM 0x20 0 USB3_DP_QSERDES_TXA_LANE_MODE_1 0xd5 0 USB3_DP_QSERDES_TXA_RCV_DETECT_LVL_2 0x12 0 USB3_DP_QSERDES_TXA_RES_CODE_LANE_TX 0x00 0 USB3_DP_QSERDES_TXA_RES_CODE_LANE_RX 0x00 0 USB3_DP_QSERDES_TXA_RES_CODE_LANE_OFFSET_TX 0x16 0 USB3_DP_QSERDES_TXA_RES_CODE_LANE_OFFSET_RX 0x05 0 USB3_DP_QSERDES_TXA_PI_QEC_CTRL 0x20 0 USB3_DP_QSERDES_RXA_UCDR_SO_GAIN 0x04 0 USB3_DP_QSERDES_RXA_UCDR_FASTLOCK_FO_GAIN 0x2f 0 USB3_DP_QSERDES_RXA_UCDR_SO_SATURATION_AND_ENABLE 0x7f 0 USB3_DP_QSERDES_RXA_UCDR_FASTLOCK_COUNT_LOW 0xff 0 USB3_DP_QSERDES_RXA_UCDR_FASTLOCK_COUNT_HIGH 0x0f 0 USB3_DP_QSERDES_RXA_UCDR_PI_CONTROLS 0x99 0 USB3_DP_QSERDES_RXA_UCDR_SB2_THRESH1 0x04 0 USB3_DP_QSERDES_RXA_UCDR_SB2_THRESH2 0x08 0 USB3_DP_QSERDES_RXA_UCDR_SB2_GAIN1 0x05 0 USB3_DP_QSERDES_RXA_UCDR_SB2_GAIN2 0x05 0 USB3_DP_QSERDES_RXA_AUX_DATA_TCOARSE_TFINE 0xa0 0 USB3_DP_QSERDES_RXA_VGA_CAL_CNTRL1 0x54 0 USB3_DP_QSERDES_RXA_VGA_CAL_CNTRL2 0x0e 0 USB3_DP_QSERDES_RXA_GM_CAL 0x1f 0 USB3_DP_QSERDES_RXA_RX_EQU_ADAPTOR_CNTRL2 0x0f 0 USB3_DP_QSERDES_RXA_RX_EQU_ADAPTOR_CNTRL3 0x4a 0 USB3_DP_QSERDES_RXA_RX_EQU_ADAPTOR_CNTRL4 0x0a 0 USB3_DP_QSERDES_RXA_RX_IDAC_TSETTLE_LOW 0xc0 0 USB3_DP_QSERDES_RXA_RX_IDAC_TSETTLE_HIGH 0x00 0 USB3_DP_QSERDES_RXA_RX_EQ_OFFSET_ADAPTOR_CNTRL1 0x77 0 USB3_DP_QSERDES_RXA_RX_OFFSET_ADAPTOR_CNTRL2 0x80 0 USB3_DP_QSERDES_RXA_SIGDET_CNTRL 0x04 0 USB3_DP_QSERDES_RXA_SIGDET_DEGLITCH_CNTRL 0x0e 0 USB3_DP_QSERDES_RXA_RX_MODE_00_LOW 0xbf 0 USB3_DP_QSERDES_RXA_RX_MODE_00_HIGH 0xbf 0 USB3_DP_QSERDES_RXA_RX_MODE_00_HIGH2 0x3f 0 USB3_DP_QSERDES_RXA_RX_MODE_00_HIGH3 0x7f 0 USB3_DP_QSERDES_RXA_RX_MODE_00_HIGH4 0x94 0 USB3_DP_QSERDES_RXA_RX_MODE_01_LOW 0xdc 0 USB3_DP_QSERDES_RXA_RX_MODE_01_HIGH 0xdc 0 USB3_DP_QSERDES_RXA_RX_MODE_01_HIGH2 0x5c 0 USB3_DP_QSERDES_RXA_RX_MODE_01_HIGH3 0x0b 0 USB3_DP_QSERDES_RXA_RX_MODE_01_HIGH4 0xb3 0 USB3_DP_QSERDES_RXA_DFE_EN_TIMER 0x04 0 USB3_DP_QSERDES_RXA_DFE_CTLE_POST_CAL_OFFSET 0x38 0 USB3_DP_QSERDES_RXA_DCC_CTRL1 0xc 0 USB3_DP_QSERDES_RXA_VTH_CODE 0x10 0 USB3_DP_QSERDES_TXB_LANE_MODE_1 0xd5 0 USB3_DP_QSERDES_TXB_RCV_DETECT_LVL_2 0x12 0 USB3_DP_QSERDES_TXB_RES_CODE_LANE_TX 0x00 0 USB3_DP_QSERDES_TXB_RES_CODE_LANE_RX 0x00 0 USB3_DP_QSERDES_TXB_RES_CODE_LANE_OFFSET_TX 0x16 0 USB3_DP_QSERDES_TXB_RES_CODE_LANE_OFFSET_RX 0x05 0 USB3_DP_QSERDES_TXB_PI_QEC_CTRL 0x20 0 USB3_DP_QSERDES_RXB_UCDR_SO_GAIN 0x04 0 USB3_DP_QSERDES_RXB_UCDR_FASTLOCK_FO_GAIN 0x2f 0 USB3_DP_QSERDES_RXB_UCDR_SO_SATURATION_AND_ENABLE 0x7f 0 USB3_DP_QSERDES_RXB_UCDR_FASTLOCK_COUNT_LOW 0xff 0 USB3_DP_QSERDES_RXB_UCDR_FASTLOCK_COUNT_HIGH 0x0f 0 USB3_DP_QSERDES_RXB_UCDR_PI_CONTROLS 0x99 0 USB3_DP_QSERDES_RXB_UCDR_SB2_THRESH1 0x04 0 USB3_DP_QSERDES_RXB_UCDR_SB2_THRESH2 0x08 0 USB3_DP_QSERDES_RXB_UCDR_SB2_GAIN1 0x05 0 USB3_DP_QSERDES_RXB_UCDR_SB2_GAIN2 0x05 0 USB3_DP_QSERDES_RXB_AUX_DATA_TCOARSE_TFINE 0xa0 0 USB3_DP_QSERDES_RXB_VGA_CAL_CNTRL1 0x54 0 USB3_DP_QSERDES_RXB_VGA_CAL_CNTRL2 0x0e 0 USB3_DP_QSERDES_RXB_GM_CAL 0x1f 0 USB3_DP_QSERDES_RXB_RX_EQU_ADAPTOR_CNTRL2 0x0f 0 USB3_DP_QSERDES_RXB_RX_EQU_ADAPTOR_CNTRL3 0x4a 0 USB3_DP_QSERDES_RXB_RX_EQU_ADAPTOR_CNTRL4 0x0a 0 USB3_DP_QSERDES_RXB_RX_IDAC_TSETTLE_LOW 0xc0 0 USB3_DP_QSERDES_RXB_RX_IDAC_TSETTLE_HIGH 0x00 0 USB3_DP_QSERDES_RXB_RX_EQ_OFFSET_ADAPTOR_CNTRL1 0x77 0 USB3_DP_QSERDES_RXB_RX_OFFSET_ADAPTOR_CNTRL2 0x80 0 USB3_DP_QSERDES_RXB_SIGDET_CNTRL 0x04 0 USB3_DP_QSERDES_RXB_SIGDET_DEGLITCH_CNTRL 0x0e 0 USB3_DP_QSERDES_RXB_RX_MODE_00_LOW 0xbf 0 USB3_DP_QSERDES_RXB_RX_MODE_00_HIGH 0xbf 0 USB3_DP_QSERDES_RXB_RX_MODE_00_HIGH2 0x3f 0 USB3_DP_QSERDES_RXB_RX_MODE_00_HIGH3 0x7f 0 USB3_DP_QSERDES_RXB_RX_MODE_00_HIGH4 0x94 0 USB3_DP_QSERDES_RXB_RX_MODE_01_LOW 0xdc 0 USB3_DP_QSERDES_RXB_RX_MODE_01_HIGH 0xdc 0 USB3_DP_QSERDES_RXB_RX_MODE_01_HIGH2 0x5c 0 USB3_DP_QSERDES_RXB_RX_MODE_01_HIGH3 0x0b 0 USB3_DP_QSERDES_RXB_RX_MODE_01_HIGH4 0xb3 0 USB3_DP_QSERDES_RXB_DFE_EN_TIMER 0x04 0 USB3_DP_QSERDES_RXB_DFE_CTLE_POST_CAL_OFFSET 0x38 0 USB3_DP_QSERDES_RXB_DCC_CTRL1 0xc 0 USB3_DP_QSERDES_RXB_VTH_CODE 0x10 0 USB3_DP_PCS_LOCK_DETECT_CONFIG1 0xd0 0 USB3_DP_PCS_LOCK_DETECT_CONFIG2 0x17 0 USB3_DP_PCS_LOCK_DETECT_CONFIG3 0x20 0 USB3_DP_PCS_RX_SIGDET_LVL 0xaa 0 USB3_DP_PCS_ALIGN_DETECT_CONFIG1 0x88 0 USB3_DP_PCS_ALIGN_DETECT_CONFIG2 0x13 0 USB3_DP_PCS_EQ_CONFIG1 0x0d 0 USB3_DP_PCS_EQ_CONFIG5 0x50 0 USB3_DP_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL 0xf8 0 USB3_DP_PCS_USB3_RXEQTRAINING_DFE_TIME_S2 0x07 0 0xffffffff 0xffffffff 0x00>; };
