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Commit 7973c8d9 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Disable PCIe enumeration on boot for QCS405"

parents 8a47228a 42a63da9

arch/arm64/boot/dts/qcom/qcs405-pcie.dtsi

+1 −5
Original line number Diff line number Diff line
@@ -81,13 +81,9 @@ 
		qcom,phy-status-offset = <0x3c>;

		qcom,phy-status-bit = <0>;

		qcom,phy-power-down-offset = <0x98>;

		qcom,boot-option = <0x0>;

		qcom,boot-option = <0x1>;

		qcom,keep-powerdown-phy;



		qcom,no-l0s-supported;

		qcom,no-l1-supported;

		qcom,no-l1ss-supported;

		qcom,no-aux-clk-sync;



		linux,pci-domain = <0>;

arch/arm64/boot/dts/qcom/qcs405.dtsi

+0 −1
Original line number Diff line number Diff line
@@ -310,7 +310,6 @@ 
		reg = <0x1800000 0x80000>;

		reg-names = "cc_base";

		vdd_cx-supply = <&pms405_s1_level>;

		vdd_sr_pll-supply = <&pms405_l3>;

		clocks = <&clock_rpmcc RPM_SMD_XO_CLK_SRC>;

		qcom,gcc_oxili_gfx3d_clk-opp-handle = <&msm_gpu>;

		clock-names = "cxo";

drivers/clk/qcom/gcc-qcs405.c

+0 −14
Original line number Diff line number Diff line
@@ -41,7 +41,6 @@ 
#define F_SLEW(f, s, h, m, n, sf) { (f), (s), (2 * (h) - 1), (m), (n), (sf) }



static DEFINE_VDD_REGULATORS(vdd_cx, VDD_NUM, 1, vdd_corner);

static DEFINE_VDD_REGULATORS(vdd_sr_pll, VDD_SR_PLL_NUM, 1, vdd_sr_levels);



enum {

	P_CORE_BI_PLL_TEST_SE,
@@ -413,11 +412,6 @@ static struct clk_pll gpll6 = { 
		.parent_names = (const char *[]){ "cxo" },

		.num_parents = 1,

		.ops = &clk_pll_ops,

		.vdd_class = &vdd_sr_pll,

		.rate_max = (unsigned long [VDD_SR_PLL_NUM]) {

			[VDD_SR_PLL_SVS] = 1080000000,

		},

		.num_rate_max = VDD_SR_PLL_NUM,

	},

};
@@ -2963,14 +2957,6 @@ static int gcc_qcs405_probe(struct platform_device *pdev) 
		return PTR_ERR(vdd_cx.regulator[0]);

	}



	vdd_sr_pll.regulator[0] = devm_regulator_get(&pdev->dev, "vdd_sr_pll");

	if (IS_ERR(vdd_sr_pll.regulator[0])) {

		if (!(PTR_ERR(vdd_sr_pll.regulator[0]) == -EPROBE_DEFER))

			dev_err(&pdev->dev,

				"Unable to get vdd_sr_pll regulator\n");

		return PTR_ERR(vdd_sr_pll.regulator[0]);

	}



	clk_alpha_pll_configure(&gpll3_out_main, regmap, &gpll3_config);



	clk = devm_clk_register(&pdev->dev, &wcnss_m_clk.hw);

drivers/clk/qcom/vdd-level-405.h

+1 −16
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2018, The Linux Foundation. All rights reserved.

 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -55,19 +55,4 @@ static int vdd_hf_levels[] = { 
	1800000, RPM_REGULATOR_LEVEL_TURBO,	/* VDD_HF_PLL_TUR */

};



enum vdd_sr_pll_levels {

	VDD_SR_PLL_OFF,

	VDD_SR_PLL_SVS,

	VDD_SR_PLL_NOM,

	VDD_SR_PLL_TUR,

	VDD_SR_PLL_NUM,

};



static int vdd_sr_levels[] = {

	0,	/* VDD_SR_PLL_OFF */

	976000,	/* VDD_SR_PLL_SVS */

	976000,	/* VDD_SR_PLL_NOM */

	976000,	/* VDD_SR_PLL_TUR */

};



#endif