Merge "Merge remote-tracking branch 'quic/dev/msm-4.14-display' into msm-4.14" (786e83fb) · Commits · e / devices / android_kernel_xiaomi_nabu

arch/arm64/boot/dts/qcom/sm8150-sde-display.dtsi

+1 −0

Original line number	Diff line number	Diff line
		@@ -549,6 +549,7 @@
		qcom,mdss-dsi-panel-status-value = <0x77>;
		qcom,mdss-dsi-panel-on-check-value = <0x77>;
		qcom,mdss-dsi-panel-status-read-length = <1>;
		qcom,mdss-dsi-qsync-min-refresh-rate = <55>;
		qcom,mdss-dsi-display-timings {
		timing@0{
		qcom,mdss-dsi-panel-phy-timings = [00 1e 08 07 24 22 08

drivers/gpu/drm/drm_edid.c

+4 −2

Original line number	Diff line number	Diff line
		@@ -194,7 +194,8 @@ static const struct drm_display_mode drm_dmt_modes[] = {
		/* 0x05 - 640x480@72Hz */
		{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
		704, 832, 0, 480, 489, 492, 520, 0,
		DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC) },
		DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
		.vrefresh = 72, },
		/* 0x06 - 640x480@75Hz */
		{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
		720, 840, 0, 480, 481, 484, 500, 0,
		@@ -551,7 +552,8 @@ static const struct drm_display_mode edid_est_modes[] = {
		DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
		{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
		704, 832, 0, 480, 489, 492, 520, 0,
		DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
		DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
		.vrefresh = 72, }, /* 640x480@72Hz */
		{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
		768, 864, 0, 480, 483, 486, 525, 0,
		DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */

drivers/gpu/drm/msm/dp/dp_debug.c

+18 −2

Original line number	Diff line number	Diff line
		@@ -117,10 +117,26 @@ static ssize_t dp_debug_write_edid(struct file *file,
		goto bail;

		if (edid_size != debug->edid_size) {
		pr_debug("clearing debug edid\n");
		pr_debug("realloc debug edid\n");

		if (debug->edid) {
		devm_kfree(debug->dev, debug->edid);

		debug->edid = devm_kzalloc(debug->dev,
		edid_size, GFP_KERNEL);
		if (!debug->edid) {
		rc = -ENOMEM;
		goto bail;
		}

		debug->edid_size = edid_size;

		debug->aux->set_sim_mode(debug->aux,
		debug->dp_debug.sim_mode,
		debug->edid, debug->dpcd);
		}
		}

		while (edid_size--) {
		char t[3];
		int d;

drivers/gpu/drm/msm/sde/sde_encoder.c

+6 −6

Original line number	Diff line number	Diff line
		@@ -3633,17 +3633,20 @@ static void _sde_encoder_kickoff_phys(struct sde_encoder_virt *sde_enc)
		u32 pending_kickoff_cnt;
		struct msm_drm_private *priv = NULL;
		struct sde_kms *sde_kms = NULL;
		bool is_vid_mode = false;

		if (!sde_enc) {
		SDE_ERROR("invalid encoder\n");
		return;
		}

		is_vid_mode = sde_enc->disp_info.capabilities &
		MSM_DISPLAY_CAP_VID_MODE;

		/* don't perform flush/start operations for slave encoders */
		for (i = 0; i < sde_enc->num_phys_encs; i++) {
		struct sde_encoder_phys *phys = sde_enc->phys_encs[i];
		enum sde_rm_topology_name topology = SDE_RM_TOPOLOGY_NONE;
		bool wait_for_dma = false;

		if (!phys \|\| phys->enable_state == SDE_ENC_DISABLED)
		continue;
		@@ -3652,13 +3655,10 @@ static void _sde_encoder_kickoff_phys(struct sde_encoder_virt *sde_enc)
		if (!ctl)
		continue;

		if (phys->ops.wait_dma_trigger)
		wait_for_dma = phys->ops.wait_dma_trigger(
		phys);

		/* make reg dma kickoff as blocking for vidoe-mode */
		if (phys->hw_ctl->ops.reg_dma_flush)
		phys->hw_ctl->ops.reg_dma_flush(phys->hw_ctl,
		wait_for_dma);
		is_vid_mode);

		if (phys->connector)
		topology = sde_connector_get_topology_name(

drivers/gpu/drm/msm/sde/sde_encoder_phys_cmd.c

+42 −25

Original line number	Diff line number	Diff line
		@@ -50,6 +50,8 @@
		*/
		#define SDE_ENC_CTL_START_THRESHOLD_US 500

		#define SDE_ENC_MAX_POLL_TIMEOUT_US 2000

		static inline int _sde_encoder_phys_cmd_get_idle_timeout(
		struct sde_encoder_phys_cmd *cmd_enc)
		{
		@@ -420,6 +422,10 @@ static void sde_encoder_phys_cmd_cont_splash_mode_set(
		struct sde_encoder_phys *phys_enc,
		struct drm_display_mode *adj_mode)
		{
		struct sde_hw_intf *hw_intf;
		struct sde_hw_pingpong *hw_pp;
		struct sde_encoder_phys_cmd *cmd_enc;

		if (!phys_enc \|\| !adj_mode) {
		SDE_ERROR("invalid args\n");
		return;
		@@ -435,6 +441,21 @@ static void sde_encoder_phys_cmd_cont_splash_mode_set(
		return;
		}

		if (sde_encoder_phys_cmd_is_master(phys_enc)) {
		cmd_enc = to_sde_encoder_phys_cmd(phys_enc);
		hw_pp = phys_enc->hw_pp;
		hw_intf = phys_enc->hw_intf;

		if (phys_enc->has_intf_te && hw_intf &&
		hw_intf->ops.get_autorefresh) {
		hw_intf->ops.get_autorefresh(hw_intf,
		&cmd_enc->autorefresh.cfg);
		} else if (hw_pp && hw_pp->ops.get_autorefresh) {
		hw_pp->ops.get_autorefresh(hw_pp,
		&cmd_enc->autorefresh.cfg);
		}
		}

		_sde_encoder_phys_cmd_setup_irq_hw_idx(phys_enc);
		}

		@@ -1506,7 +1527,7 @@ static void sde_encoder_phys_cmd_prepare_commit(
		{
		struct sde_encoder_phys_cmd *cmd_enc =
		to_sde_encoder_phys_cmd(phys_enc);
		unsigned long lock_flags;
		int trial = 0;

		if (!phys_enc)
		return;
		@@ -1520,35 +1541,31 @@ static void sde_encoder_phys_cmd_prepare_commit(
		if (!sde_encoder_phys_cmd_is_autorefresh_enabled(phys_enc))
		return;

		/**
		* Autorefresh must be disabled carefully:
		* - Autorefresh must be disabled between pp_done and te
		* signal prior to sdm845 targets. All targets after sdm845
		* supports autorefresh disable without turning off the
		* hardware TE and pp_done wait.
		*
		* - Wait for TX to Complete
		* Wait for PPDone confirms the last frame transfer is complete.
		*
		* - Leave Autorefresh Disabled
		* - Assume disable of Autorefresh since it is now safe
		* - Can now safely Disable Encoder, do debug printing, etc.
		* without worrying that Autorefresh will kickoff
		/*
		* If autorefresh is enabled, disable it and make sure it is safe to
		* proceed with current frame commit/push. Sequence fallowed is,
		* 1. Disable TE
		* 2. Disable autorefresh config
		* 4. Poll for frame transfer ongoing to be false
		* 5. Enable TE back
		*/

		spin_lock_irqsave(phys_enc->enc_spinlock, lock_flags);
		sde_encoder_phys_cmd_connect_te(phys_enc, false);

		_sde_encoder_phys_cmd_config_autorefresh(phys_enc, 0);

		/* check for outstanding TX */
		if (_sde_encoder_phys_cmd_is_ongoing_pptx(phys_enc))
		atomic_add_unless(&phys_enc->pending_kickoff_cnt, 1, 1);
		spin_unlock_irqrestore(phys_enc->enc_spinlock, lock_flags);
		do {
		udelay(SDE_ENC_MAX_POLL_TIMEOUT_US);
		if ((trial * SDE_ENC_MAX_POLL_TIMEOUT_US)
		> (KICKOFF_TIMEOUT_MS * USEC_PER_MSEC)) {
		SDE_ERROR_CMDENC(cmd_enc,
		"disable autorefresh failed\n");
		break;
		}

		/* wait for ppdone if necessary due to catching ongoing TX */
		if (_sde_encoder_phys_cmd_wait_for_idle(phys_enc))
		SDE_ERROR_CMDENC(cmd_enc, "pp:%d kickoff timed out\n",
		phys_enc->hw_pp->idx - PINGPONG_0);
		trial++;
		} while (_sde_encoder_phys_cmd_is_ongoing_pptx(phys_enc));

		sde_encoder_phys_cmd_connect_te(phys_enc, true);

		SDE_DEBUG_CMDENC(cmd_enc, "disabled autorefresh\n");
		}