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Commit 784c7444 authored by Stephen Warren's avatar Stephen Warren
Browse files

ARM: tegra: add MMC controllers to Tegra124 DT 



Tegra124 has 4 MMC controllers just like previous versions of the SoC.
Note that there are some non-backwards-compatible HW differences, and
hence a new DT compatible value must be used to describe the HW.

Also enable the relevant controllers in the Venice2 board DT.

power-gpios property suggested by Thierry Reding.

Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
Reviewed-by: default avatarThierry Reding <treding@nvidia.com>
Tested-by: default avatarThierry Reding <treding@nvidia.com>
parent caefe637

arch/arm/boot/dts/tegra124-venice2.dts

+12 −0
Original line number Diff line number Diff line
@@ -25,6 +25,18 @@ 
		nvidia,sys-clock-req-active-high;

	};



	sdhci@700b0400 {

		cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;

		power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;

		status = "okay";

		bus-width = <4>;

	};



	sdhci@700b0600 {

		status = "okay";

		bus-width = <8>;

	};



	clocks {

		compatible = "simple-bus";

		#address-cells = <1>;

arch/arm/boot/dts/tegra124.dtsi

+40 −0
Original line number Diff line number Diff line
@@ -190,6 +190,46 @@ 
		clock-names = "pclk", "clk32k_in";

	};



	sdhci@700b0000 {

		compatible = "nvidia,tegra124-sdhci";

		reg = <0x700b0000 0x200>;

		interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&tegra_car TEGRA124_CLK_SDMMC1>;

		resets = <&tegra_car 14>;

		reset-names = "sdhci";

		status = "disable";

	};



	sdhci@700b0200 {

		compatible = "nvidia,tegra124-sdhci";

		reg = <0x700b0200 0x200>;

		interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&tegra_car TEGRA124_CLK_SDMMC2>;

		resets = <&tegra_car 9>;

		reset-names = "sdhci";

		status = "disable";

	};



	sdhci@700b0400 {

		compatible = "nvidia,tegra124-sdhci";

		reg = <0x700b0400 0x200>;

		interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&tegra_car TEGRA124_CLK_SDMMC3>;

		resets = <&tegra_car 69>;

		reset-names = "sdhci";

		status = "disable";

	};



	sdhci@700b0600 {

		compatible = "nvidia,tegra124-sdhci";

		reg = <0x700b0600 0x200>;

		interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&tegra_car TEGRA124_CLK_SDMMC4>;

		resets = <&tegra_car 15>;

		reset-names = "sdhci";

		status = "disable";

	};



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;