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Commit 7628ce49 authored by Sahil Chandna's avatar Sahil Chandna Committed by Gerrit - the friendly Code Review server
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power: qpnp-fg-gen3: Enable voltage-mode correction saturation clear



As per the hardware recommendation enable the voltage-mode correction
saturation-clear config. This resets the voltage mode correction
and allows battery-SOC to be copied from CC-SOC.

Change-Id: Iea2becd7bcca004cc861fa488161a40cab29f114
Signed-off-by: default avatarAnirudh Ghayal <aghayal@codeaurora.org>
Signed-off-by: default avatarSahil Chandna <chandna@codeaurora.org>
parent cd40741d
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+9 −0
Original line number Diff line number Diff line
@@ -3908,6 +3908,7 @@ static const struct power_supply_desc fg_psy_desc = {

#define DEFAULT_ESR_CHG_TIMER_RETRY	8
#define DEFAULT_ESR_CHG_TIMER_MAX	16
#define VOLTAGE_MODE_SAT_CLEAR_BIT	BIT(3)
static int fg_hw_init(struct fg_dev *fg)
{
	struct fg_gen3_chip *chip = container_of(fg, struct fg_gen3_chip, fg);
@@ -4131,6 +4132,14 @@ static int fg_hw_init(struct fg_dev *fg)
		return rc;
	}

	rc = fg_sram_masked_write(fg, ESR_EXTRACTION_ENABLE_WORD,
				ESR_EXTRACTION_ENABLE_OFFSET,
				VOLTAGE_MODE_SAT_CLEAR_BIT,
				VOLTAGE_MODE_SAT_CLEAR_BIT,
				FG_IMA_DEFAULT);
	if (rc < 0)
		return rc;

	fg_encode(fg->sp, FG_SRAM_ESR_TIGHT_FILTER,
		chip->dt.esr_tight_flt_upct, buf);
	rc = fg_sram_write(fg, fg->sp[FG_SRAM_ESR_TIGHT_FILTER].addr_word,