Merge "msm: vidc: Fix setting RC mode control" (75eac131) · Commits · e / devices / android_kernel_xiaomi_nabu

drivers/media/platform/msm/vidc/msm_venc.c

+60 −75

Original line number	Original line	Diff line number	Diff line
	@@ -1292,6 +1292,50 @@ struct v4l2_ctrl msm_venc_get_ctrl(struct msm_vidc_inst inst, u32 id)
	return NULL;		return NULL;
	}		}

			static int msm_venc_resolve_rc_enable(struct msm_vidc_inst *inst,
			struct v4l2_ctrl *ctrl)
			{
			struct v4l2_ctrl *rc_mode;

			if (!ctrl->val) {
			dprintk(VIDC_DBG,
			"RC is not enabled. Setting RC OFF\n");
			inst->rc_type = RATE_CONTROL_OFF;
			} else {
			rc_mode = msm_venc_get_ctrl(inst,
			V4L2_CID_MPEG_VIDEO_BITRATE_MODE);
			if (!rc_mode) {
			dprintk(VIDC_ERR,
			"%s: get bitrate mode failed\n", __func__);
			return -EINVAL;
			}
			inst->rc_type = rc_mode->val;
			}
			return 0;
			}

			static int msm_venc_resolve_rate_control(struct msm_vidc_inst *inst,
			struct v4l2_ctrl *ctrl)
			{
			struct v4l2_ctrl *rc_enable;

			rc_enable = msm_venc_get_ctrl(inst,
			V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE);
			if (rc_enable) {
			if ((ctrl->val == V4L2_MPEG_VIDEO_BITRATE_MODE_CQ) &&
			inst->fmts[CAPTURE_PORT].fourcc != V4L2_PIX_FMT_HEVC) {
			dprintk(VIDC_ERR, "CQ supported only for HEVC\n");
			return -EINVAL;
			}
			inst->rc_type = ctrl->val;
			} else {
			dprintk(VIDC_ERR,
			"RC is not enabled.\n");
			return -EINVAL;
			}
			return 0;
			}

	int msm_venc_s_ctrl(struct msm_vidc_inst inst, struct v4l2_ctrl ctrl)		int msm_venc_s_ctrl(struct msm_vidc_inst inst, struct v4l2_ctrl ctrl)
	{		{
	int rc = 0;		int rc = 0;
	@@ -1339,20 +1383,10 @@ int msm_venc_s_ctrl(struct msm_vidc_inst inst, struct v4l2_ctrl ctrl)
	break;		break;
	case V4L2_CID_MPEG_VIDEO_BITRATE_MODE:		case V4L2_CID_MPEG_VIDEO_BITRATE_MODE:
	{		{
	struct v4l2_ctrl *rc_enable = try_get_ctrl(		rc = msm_venc_resolve_rate_control(inst, ctrl);
	V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE, ctrl);		if (rc)
	if (!rc_enable->val) {
	dprintk(VIDC_ERR,		dprintk(VIDC_ERR,
	"RC is not enabled. Cannot set RC mode\n");		"%s: set bitrate mode failed\n", __func__);
	rc = -ENOTSUPP;
	break;
	}
	if ((ctrl->val == V4L2_MPEG_VIDEO_BITRATE_MODE_CQ) &&
	inst->fmts[CAPTURE_PORT].fourcc != V4L2_PIX_FMT_HEVC) {
	dprintk(VIDC_ERR, "CQ supported only for HEVC\n");
	rc = -ENOTSUPP;
	break;
	}
	break;		break;
	}		}
	case V4L2_CID_MPEG_VIDC_COMPRESSION_QUALITY:		case V4L2_CID_MPEG_VIDC_COMPRESSION_QUALITY:
	@@ -1542,11 +1576,16 @@ int msm_venc_s_ctrl(struct msm_vidc_inst inst, struct v4l2_ctrl ctrl)
	}		}

	break;		break;
			case V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE:
			rc = msm_venc_resolve_rc_enable(inst, ctrl);
			if (rc)
			dprintk(VIDC_ERR,
			"%s: set rc enable failed.\n", __func__);
			break;
	case V4L2_CID_MPEG_VIDEO_B_FRAMES:		case V4L2_CID_MPEG_VIDEO_B_FRAMES:
	case V4L2_CID_ROTATE:		case V4L2_CID_ROTATE:
	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER:		case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER:
	case V4L2_CID_MPEG_VIDC_VIDEO_LTRCOUNT:		case V4L2_CID_MPEG_VIDC_VIDEO_LTRCOUNT:
	case V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE:
	case V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE:		case V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE:
	case V4L2_CID_MPEG_VIDEO_H264_PROFILE:		case V4L2_CID_MPEG_VIDEO_H264_PROFILE:
	case V4L2_CID_MPEG_VIDEO_H264_LEVEL:		case V4L2_CID_MPEG_VIDEO_H264_LEVEL:
	@@ -2023,7 +2062,6 @@ int msm_venc_set_rate_control(struct msm_vidc_inst *inst)
	{		{
	int rc = 0;		int rc = 0;
	struct hfi_device *hdev;		struct hfi_device *hdev;
	struct v4l2_ctrl *bitrate_mode;
	struct v4l2_ctrl *hier_layers;		struct v4l2_ctrl *hier_layers;
	struct v4l2_ctrl *hier_type;		struct v4l2_ctrl *hier_type;

	@@ -2033,19 +2071,7 @@ int msm_venc_set_rate_control(struct msm_vidc_inst *inst)
	}		}
	hdev = inst->core->device;		hdev = inst->core->device;

	bitrate_mode = msm_venc_get_ctrl(inst,		if ((inst->rc_type == V4L2_MPEG_VIDEO_BITRATE_MODE_CBR_VFR) &&
	V4L2_CID_MPEG_VIDEO_BITRATE_MODE);
	if (!bitrate_mode) {
	dprintk(VIDC_ERR, "%s: get bitrate mode failed\n", __func__);
	return -EINVAL;
	}
	if (bitrate_mode->val == V4L2_MPEG_VIDEO_BITRATE_MODE_CQ &&
	inst->fmts[CAPTURE_PORT].fourcc != V4L2_PIX_FMT_HEVC) {
	dprintk(VIDC_ERR,
	"%s: CQ supported only for HEVC\n", __func__);
	return -EINVAL;
	}
	if ((bitrate_mode->val == V4L2_MPEG_VIDEO_BITRATE_MODE_CBR_VFR) &&
	(inst->fmts[CAPTURE_PORT].fourcc == V4L2_PIX_FMT_H264)) {		(inst->fmts[CAPTURE_PORT].fourcc == V4L2_PIX_FMT_H264)) {
	hier_layers = msm_venc_get_ctrl(inst,		hier_layers = msm_venc_get_ctrl(inst,
	V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER);		V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER);
	@@ -2060,9 +2086,9 @@ int msm_venc_set_rate_control(struct msm_vidc_inst *inst)
	return -EINVAL;		return -EINVAL;
	}		}
	}		}
	dprintk(VIDC_DBG, "%s: %d\n", __func__, bitrate_mode->val);		dprintk(VIDC_DBG, "%s: %d\n", __func__, inst->rc_type);
	rc = call_hfi_op(hdev, session_set_property, inst->session,		rc = call_hfi_op(hdev, session_set_property, inst->session,
	HAL_PARAM_VENC_RATE_CONTROL, &bitrate_mode->val);		HAL_PARAM_VENC_RATE_CONTROL, &inst->rc_type);
	if (rc)		if (rc)
	dprintk(VIDC_ERR, "%s: set property failed\n", __func__);		dprintk(VIDC_ERR, "%s: set property failed\n", __func__);

	@@ -2229,7 +2255,6 @@ int msm_venc_set_frame_quality(struct msm_vidc_inst *inst)
	int rc = 0;		int rc = 0;
	struct hfi_device *hdev;		struct hfi_device *hdev;
	struct v4l2_ctrl *ctrl;		struct v4l2_ctrl *ctrl;
	struct v4l2_ctrl *ctrl_t;
	struct hal_heic_frame_quality frame_quality;		struct hal_heic_frame_quality frame_quality;

	if (!inst \|\| !inst->core) {		if (!inst \|\| !inst->core) {
	@@ -2238,15 +2263,7 @@ int msm_venc_set_frame_quality(struct msm_vidc_inst *inst)
	}		}
	hdev = inst->core->device;		hdev = inst->core->device;

	if (inst->fmts[CAPTURE_PORT].fourcc != V4L2_PIX_FMT_HEVC)		if (inst->rc_type != V4L2_MPEG_VIDEO_BITRATE_MODE_CQ)
	return 0;

	ctrl_t = msm_venc_get_ctrl(inst, V4L2_CID_MPEG_VIDEO_BITRATE_MODE);
	if (!ctrl_t) {
	dprintk(VIDC_ERR, "%s: get bitrate mode failed\n", __func__);
	return -EINVAL;
	}
	if (ctrl_t->val != V4L2_MPEG_VIDEO_BITRATE_MODE_CQ)
	return 0;		return 0;

	ctrl = msm_venc_get_ctrl(inst,		ctrl = msm_venc_get_ctrl(inst,
	@@ -2271,7 +2288,6 @@ int msm_venc_set_grid(struct msm_vidc_inst *inst)
	int rc = 0;		int rc = 0;
	struct hfi_device *hdev;		struct hfi_device *hdev;
	struct v4l2_ctrl *ctrl;		struct v4l2_ctrl *ctrl;
	struct v4l2_ctrl *ctrl_t;
	struct hal_heic_grid_enable grid_enable;		struct hal_heic_grid_enable grid_enable;

	if (!inst \|\| !inst->core) {		if (!inst \|\| !inst->core) {
	@@ -2280,15 +2296,7 @@ int msm_venc_set_grid(struct msm_vidc_inst *inst)
	}		}
	hdev = inst->core->device;		hdev = inst->core->device;

	if (inst->fmts[CAPTURE_PORT].fourcc != V4L2_PIX_FMT_HEVC)		if (inst->rc_type != V4L2_MPEG_VIDEO_BITRATE_MODE_CQ)
	return 0;

	ctrl_t = msm_venc_get_ctrl(inst, V4L2_CID_MPEG_VIDEO_BITRATE_MODE);
	if (!ctrl_t) {
	dprintk(VIDC_ERR, "%s: get bitrate mode failed\n", __func__);
	return -EINVAL;
	}
	if (ctrl_t->val != V4L2_MPEG_VIDEO_BITRATE_MODE_CQ)
	return 0;		return 0;

	ctrl = msm_venc_get_ctrl(inst, V4L2_CID_MPEG_VIDC_IMG_GRID_SIZE);		ctrl = msm_venc_get_ctrl(inst, V4L2_CID_MPEG_VIDC_IMG_GRID_SIZE);
	@@ -2598,8 +2606,6 @@ int msm_venc_hierp_check(struct msm_vidc_inst *inst, u32 value)

	int msm_venc_hybrid_hp_check(struct msm_vidc_inst inst, bool hyb_hp)		int msm_venc_hybrid_hp_check(struct msm_vidc_inst inst, bool hyb_hp)
	{		{
	struct v4l2_ctrl *bitrate_mode;
	struct v4l2_ctrl *rc_enable;
	*hyb_hp = false;		*hyb_hp = false;

	if (!inst \|\| !inst->core) {		if (!inst \|\| !inst->core) {
	@@ -2610,22 +2616,7 @@ int msm_venc_hybrid_hp_check(struct msm_vidc_inst inst, bool hyb_hp)
	if (inst->fmts[CAPTURE_PORT].fourcc != V4L2_PIX_FMT_H264)		if (inst->fmts[CAPTURE_PORT].fourcc != V4L2_PIX_FMT_H264)
	return 0;		return 0;

	bitrate_mode = msm_venc_get_ctrl(inst,		if (inst->rc_type == V4L2_MPEG_VIDEO_BITRATE_MODE_VBR)
	V4L2_CID_MPEG_VIDEO_BITRATE_MODE);
	if (!bitrate_mode) {
	dprintk(VIDC_ERR, "%s: get bitrate mode failed\n", __func__);
	return -EINVAL;
	}

	rc_enable = msm_venc_get_ctrl(inst,
	V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE);
	if (!rc_enable) {
	dprintk(VIDC_ERR, "%s: get bitrate mode failed\n", __func__);
	return -EINVAL;
	}

	if (rc_enable->val &&
	bitrate_mode->val == V4L2_MPEG_VIDEO_BITRATE_MODE_VBR)
	*hyb_hp = true;		*hyb_hp = true;
	return 0;		return 0;
	}		}
	@@ -2910,7 +2901,6 @@ int msm_venc_set_vui_timing_info(struct msm_vidc_inst *inst)
	int rc = 0;		int rc = 0;
	struct hfi_device *hdev;		struct hfi_device *hdev;
	struct v4l2_ctrl *ctrl;		struct v4l2_ctrl *ctrl;
	struct v4l2_ctrl *ctrl_t;
	struct hal_vui_timing_info timing_info;		struct hal_vui_timing_info timing_info;
	bool cfr;		bool cfr;

	@@ -2934,12 +2924,7 @@ int msm_venc_set_vui_timing_info(struct msm_vidc_inst *inst)
	if (ctrl->val == V4L2_MPEG_MSM_VIDC_DISABLE)		if (ctrl->val == V4L2_MPEG_MSM_VIDC_DISABLE)
	return 0;		return 0;

	ctrl_t = msm_venc_get_ctrl(inst, V4L2_CID_MPEG_VIDEO_BITRATE_MODE);		switch (inst->rc_type) {
	if (!ctrl_t) {
	dprintk(VIDC_ERR, "%s: get bitrate mode failed\n", __func__);
	return -EINVAL;
	}
	switch (ctrl_t->val) {
	case V4L2_MPEG_VIDEO_BITRATE_MODE_VBR:		case V4L2_MPEG_VIDEO_BITRATE_MODE_VBR:
	case V4L2_MPEG_VIDEO_BITRATE_MODE_CBR:		case V4L2_MPEG_VIDEO_BITRATE_MODE_CBR:
	case V4L2_MPEG_VIDEO_BITRATE_MODE_MBR:		case V4L2_MPEG_VIDEO_BITRATE_MODE_MBR:

drivers/media/platform/msm/vidc/msm_vidc.c

+7 −17

Original line number	Original line	Diff line number	Diff line
	@@ -876,9 +876,8 @@ static inline int msm_vidc_verify_buffer_counts(struct msm_vidc_inst *inst)
	int msm_vidc_set_internal_config(struct msm_vidc_inst *inst)		int msm_vidc_set_internal_config(struct msm_vidc_inst *inst)
	{		{
	int rc = 0;		int rc = 0;
	u32 rc_mode;		u32 rc_mode = RATE_CONTROL_OFF;
	bool set_rc = false;		bool set_rc = false;
	u32 rc_enable = 0;
	struct hal_vbv_hdr_buf_size hrd_buf_size;		struct hal_vbv_hdr_buf_size hrd_buf_size;
	struct hal_enable latency;		struct hal_enable latency;
	struct hfi_device *hdev;		struct hfi_device *hdev;
	@@ -899,19 +898,13 @@ int msm_vidc_set_internal_config(struct msm_vidc_inst *inst)
	hdev = inst->core->device;		hdev = inst->core->device;

	codec = inst->fmts[CAPTURE_PORT].fourcc;		codec = inst->fmts[CAPTURE_PORT].fourcc;
	rc_enable = msm_comm_g_ctrl_for_id(inst,
	V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE);
	rc_mode = msm_comm_g_ctrl_for_id(inst,
	V4L2_CID_MPEG_VIDEO_BITRATE_MODE);
	latency.enable = msm_comm_g_ctrl_for_id(inst,		latency.enable = msm_comm_g_ctrl_for_id(inst,
	V4L2_CID_MPEG_VIDC_VIDEO_LOWLATENCY_MODE);		V4L2_CID_MPEG_VIDC_VIDEO_LOWLATENCY_MODE);

	if (rc_enable == 0) {		if (inst->rc_type == V4L2_MPEG_VIDEO_BITRATE_MODE_MBR_VFR) {
	set_rc = false;
	} else if (rc_mode == V4L2_MPEG_VIDEO_BITRATE_MODE_MBR_VFR) {
	rc_mode = V4L2_MPEG_VIDEO_BITRATE_MODE_MBR;		rc_mode = V4L2_MPEG_VIDEO_BITRATE_MODE_MBR;
	set_rc = true;		set_rc = true;
	} else if (rc_mode == V4L2_MPEG_VIDEO_BITRATE_MODE_VBR &&		} else if (inst->rc_type == V4L2_MPEG_VIDEO_BITRATE_MODE_VBR &&
	latency.enable == V4L2_MPEG_MSM_VIDC_ENABLE &&		latency.enable == V4L2_MPEG_MSM_VIDC_ENABLE &&
	codec != V4L2_PIX_FMT_VP8) {		codec != V4L2_PIX_FMT_VP8) {
	rc_mode = V4L2_MPEG_VIDEO_BITRATE_MODE_CBR;		rc_mode = V4L2_MPEG_VIDEO_BITRATE_MODE_CBR;
	@@ -955,8 +948,7 @@ int msm_vidc_set_internal_config(struct msm_vidc_inst *inst)
	bitrate = inst->clk_data.bitrate;		bitrate = inst->clk_data.bitrate;
	mb_per_frame = NUM_MBS_PER_FRAME(output_height, output_width);		mb_per_frame = NUM_MBS_PER_FRAME(output_height, output_width);

	if (rc_enable == V4L2_MPEG_MSM_VIDC_ENABLE &&		if (rc_mode != V4L2_MPEG_VIDEO_BITRATE_MODE_CBR_VFR &&
	rc_mode != V4L2_MPEG_VIDEO_BITRATE_MODE_CBR_VFR &&
	rc_mode != V4L2_MPEG_VIDEO_BITRATE_MODE_CBR) {		rc_mode != V4L2_MPEG_VIDEO_BITRATE_MODE_CBR) {
	slice_mode = V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE;		slice_mode = V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE;
	slice_val = 0;		slice_val = 0;
	@@ -1083,7 +1075,6 @@ static inline int start_streaming(struct msm_vidc_inst *inst)
	int rc = 0;		int rc = 0;
	struct hfi_device *hdev;		struct hfi_device *hdev;
	struct hal_buffer_size_minimum b;		struct hal_buffer_size_minimum b;
	u32 rc_mode;

	dprintk(VIDC_DBG, "%s: %x : inst %pK\n", __func__,		dprintk(VIDC_DBG, "%s: %x : inst %pK\n", __func__,
	hash32_ptr(inst->session), inst);		hash32_ptr(inst->session), inst);
	@@ -1105,10 +1096,8 @@ static inline int start_streaming(struct msm_vidc_inst *inst)
	}		}
	}		}

	rc_mode = msm_comm_g_ctrl_for_id(inst,
	V4L2_CID_MPEG_VIDEO_BITRATE_MODE);
	/* HEIC HW/FWK tiling encode is supported only for CQ RC mode */		/* HEIC HW/FWK tiling encode is supported only for CQ RC mode */
	if (rc_mode == V4L2_MPEG_VIDEO_BITRATE_MODE_CQ) {		if (inst->rc_type == V4L2_MPEG_VIDEO_BITRATE_MODE_CQ) {
	if (!heic_encode_session_supported(inst)) {		if (!heic_encode_session_supported(inst)) {
	dprintk(VIDC_ERR,		dprintk(VIDC_ERR,
	"HEIC Encode session not supported\n");		"HEIC Encode session not supported\n");
	@@ -1901,6 +1890,7 @@ void *msm_vidc_open(int core_id, int session_type)
	inst->level = V4L2_MPEG_VIDEO_H264_LEVEL_UNKNOWN;		inst->level = V4L2_MPEG_VIDEO_H264_LEVEL_UNKNOWN;
	inst->entropy_mode = V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC;		inst->entropy_mode = V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC;
	inst->smem_ops = &msm_vidc_smem_ops;		inst->smem_ops = &msm_vidc_smem_ops;
			inst->rc_type = RATE_CONTROL_OFF;

	for (i = SESSION_MSG_INDEX(SESSION_MSG_START);		for (i = SESSION_MSG_INDEX(SESSION_MSG_START);
	i <= SESSION_MSG_INDEX(SESSION_MSG_END); i++) {		i <= SESSION_MSG_INDEX(SESSION_MSG_END); i++) {

drivers/media/platform/msm/vidc/msm_vidc_clocks.c

+5 −11

Original line number	Original line	Diff line number	Diff line
	@@ -1260,7 +1260,6 @@ int msm_vidc_decide_work_route_iris1(struct msm_vidc_inst *inst)
	}		}
	} else if (inst->session_type == MSM_VIDC_ENCODER) {		} else if (inst->session_type == MSM_VIDC_ENCODER) {
	u32 slice_mode = 0;		u32 slice_mode = 0;
	u32 rc_mode = 0;
	u32 output_width, output_height, fps, mbps;		u32 output_width, output_height, fps, mbps;

	switch (inst->fmts[CAPTURE_PORT].fourcc) {		switch (inst->fmts[CAPTURE_PORT].fourcc) {
	@@ -1270,10 +1269,7 @@ int msm_vidc_decide_work_route_iris1(struct msm_vidc_inst *inst)
	goto decision_done;		goto decision_done;
	}		}

	rc_mode = msm_comm_g_ctrl_for_id(inst,		if (inst->rc_type == V4L2_MPEG_VIDEO_BITRATE_MODE_CQ) {
	V4L2_CID_MPEG_VIDEO_BITRATE_MODE);
	if (rc_mode ==
	V4L2_MPEG_VIDEO_BITRATE_MODE_CQ) {
	pdata.video_work_route = 2;		pdata.video_work_route = 2;
	goto decision_done;		goto decision_done;
	}		}
	@@ -1285,9 +1281,10 @@ int msm_vidc_decide_work_route_iris1(struct msm_vidc_inst *inst)
	mbps = NUM_MBS_PER_SEC(output_height, output_width, fps);		mbps = NUM_MBS_PER_SEC(output_height, output_width, fps);
	if (slice_mode ==		if (slice_mode ==
	V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES \|\|		V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES \|\|
	(rc_mode == V4L2_MPEG_VIDEO_BITRATE_MODE_CBR &&		(inst->rc_type == V4L2_MPEG_VIDEO_BITRATE_MODE_CBR &&
	mbps <= CBR_MB_LIMIT) \|\|		mbps <= CBR_MB_LIMIT) \|\|
	(rc_mode == V4L2_MPEG_VIDEO_BITRATE_MODE_CBR_VFR &&		(inst->rc_type ==
			V4L2_MPEG_VIDEO_BITRATE_MODE_CBR_VFR &&
	mbps <= CBR_VFR_MB_LIMIT)) {		mbps <= CBR_VFR_MB_LIMIT)) {
	pdata.video_work_route = 1;		pdata.video_work_route = 1;
	dprintk(VIDC_DBG, "Configured work route = 1");		dprintk(VIDC_DBG, "Configured work route = 1");
	@@ -1584,7 +1581,6 @@ static inline int msm_vidc_power_save_mode_enable(struct msm_vidc_inst *inst,
	void *pdata = NULL;		void *pdata = NULL;
	struct hfi_device *hdev = NULL;		struct hfi_device *hdev = NULL;
	enum hal_perf_mode venc_mode;		enum hal_perf_mode venc_mode;
	u32 rc_mode = 0;

	hdev = inst->core->device;		hdev = inst->core->device;
	if (inst->session_type != MSM_VIDC_ENCODER) {		if (inst->session_type != MSM_VIDC_ENCODER) {
	@@ -1600,9 +1596,7 @@ static inline int msm_vidc_power_save_mode_enable(struct msm_vidc_inst *inst,
	enable = true;		enable = true;
	}		}
	/* Power saving always disabled for CQ RC mode. */		/* Power saving always disabled for CQ RC mode. */
	rc_mode = msm_comm_g_ctrl_for_id(inst,		if (inst->rc_type == V4L2_MPEG_VIDEO_BITRATE_MODE_CQ)
	V4L2_CID_MPEG_VIDEO_BITRATE_MODE);
	if (rc_mode == V4L2_MPEG_VIDEO_BITRATE_MODE_CQ)
	enable = false;		enable = false;

	prop_id = HAL_CONFIG_VENC_PERF_MODE;		prop_id = HAL_CONFIG_VENC_PERF_MODE;

drivers/media/platform/msm/vidc/msm_vidc_internal.h

+2 −0

Original line number	Original line	Diff line number	Diff line
	@@ -52,6 +52,7 @@

	#define V4L2_EVENT_VIDC_BASE 10		#define V4L2_EVENT_VIDC_BASE 10

			#define RATE_CONTROL_OFF (V4L2_MPEG_VIDEO_BITRATE_MODE_CQ + 1)
	#define SYS_MSG_START HAL_SYS_INIT_DONE		#define SYS_MSG_START HAL_SYS_INIT_DONE
	#define SYS_MSG_END HAL_SYS_ERROR		#define SYS_MSG_END HAL_SYS_ERROR
	#define SESSION_MSG_START HAL_SESSION_EVENT_CHANGE		#define SESSION_MSG_START HAL_SESSION_EVENT_CHANGE
	@@ -469,6 +470,7 @@ struct msm_vidc_inst {
	u32 entropy_mode;		u32 entropy_mode;
	u32 grid_enable;		u32 grid_enable;
	u32 frame_quality;		u32 frame_quality;
			u32 rc_type;
	struct msm_vidc_codec_data *codec_data;		struct msm_vidc_codec_data *codec_data;
	struct hal_hdr10_pq_sei hdr10_sei_params;		struct hal_hdr10_pq_sei hdr10_sei_params;
	struct batch_mode batch;		struct batch_mode batch;