Loading drivers/platform/msm/ipa/ipa_v3/ipa.c +8 −0 Original line number Diff line number Diff line Loading @@ -6002,6 +6002,12 @@ static int ipa3_post_init(const struct ipa3_plat_drv_res *resource_p, goto fail_dma_task; } result = ipa3_allocate_coal_close_frame(); if (result) { IPAERR("failed to allocate coal frame cmd\n"); goto fail_coal_frame; } if (ipa3_nat_ipv6ct_init_devices()) { IPAERR("unable to init NAT and IPv6CT devices\n"); result = -ENODEV; Loading Loading @@ -6204,6 +6210,8 @@ static int ipa3_post_init(const struct ipa3_plat_drv_res *resource_p, fail_allok_pkt_init: ipa3_nat_ipv6ct_destroy_devices(); fail_nat_ipv6ct_init_dev: ipa3_free_coal_close_frame(); fail_coal_frame: ipa3_free_dma_task_for_gsi(); fail_dma_task: fail_init_hw: Loading drivers/platform/msm/ipa/ipa_v3/ipa_dp.c +11 −4 Original line number Diff line number Diff line Loading @@ -2030,7 +2030,6 @@ static void ipa3_replenish_rx_page_recycle(struct ipa3_sys_context *sys) rx_pkt = sys->repl->cache[curr_wq]; curr_wq = (++curr_wq == sys->repl->capacity) ? 0 : curr_wq; atomic_set(&sys->repl->head_idx, curr_wq); } dma_sync_single_for_device(ipa3_ctx->pdev, Loading Loading @@ -2068,6 +2067,7 @@ static void ipa3_replenish_rx_page_recycle(struct ipa3_sys_context *sys) if (ret == GSI_STATUS_SUCCESS) { /* ensure write is done before setting head index */ mb(); atomic_set(&sys->repl->head_idx, curr_wq); atomic_set(&sys->page_recycle_repl->head_idx, curr); sys->len = rx_len_cached; } else { Loading Loading @@ -4926,9 +4926,12 @@ int ipa3_rx_poll(u32 clnt_hdl, int weight) } cnt += weight - remain_aggr_weight * IPA_WAN_AGGR_PKT_CNT; /* call repl_hdlr before napi_reschedule / napi_complete */ if (cnt) ep->sys->repl_hdlr(ep->sys); if (cnt < weight) { /* When not able to replenish enough descriptors pipe wait * until minimum number descripotrs to replish. */ if (cnt < weight && ep->sys->len > IPA_DEFAULT_SYS_YELLOW_WM) { napi_complete(ep->sys->napi_obj); ret = ipa3_rx_switch_to_intr_mode(ep->sys); if (ret == -GSI_STATUS_PENDING_IRQ && Loading @@ -4939,6 +4942,10 @@ int ipa3_rx_poll(u32 clnt_hdl, int weight) ipa_pm_deferred_deactivate(ep->sys->pm_hdl); else ipa3_dec_client_disable_clks_no_block(&log); } else { cnt = weight; IPADBG_LOW("Client = %d not replenished free descripotrs\n", ep->client); } return cnt; Loading drivers/platform/msm/ipa/ipa_v3/ipa_i.h +4 −0 Original line number Diff line number Diff line Loading @@ -1816,6 +1816,7 @@ struct ipa3_pc_mbox_data { * @wdi3_ctx: IPA wdi3 context * @gsi_info: channel/protocol info for GSI offloading uC stats * IPA context - holds all relevant info about IPA driver and its state * @coal_cmd_pyld: holds the coslescing close frame command payload */ struct ipa3_context { struct ipa3_char_device_context cdev; Loading Loading @@ -1987,6 +1988,7 @@ struct ipa3_context { gsi_info[IPA_HW_PROTOCOL_MAX]; bool ipa_mhi_proxy; bool ipa_wan_skb_page; struct ipahal_imm_cmd_pyld *coal_cmd_pyld; }; struct ipa3_plat_drv_res { Loading Loading @@ -3053,6 +3055,8 @@ void ipa3_disable_prefetch(enum ipa_client_type client); int ipa3_alloc_common_event_ring(void); int ipa3_allocate_dma_task_for_gsi(void); void ipa3_free_dma_task_for_gsi(void); int ipa3_allocate_coal_close_frame(void); void ipa3_free_coal_close_frame(void); int ipa3_set_clock_plan_from_pm(int idx); void __ipa_gsi_irq_rx_scedule_poll(struct ipa3_sys_context *sys); int ipa3_tz_unlock_reg(struct ipa_tz_unlock_reg_info *reg_info, u16 num_regs); Loading drivers/platform/msm/ipa/ipa_v3/ipa_utils.c +36 −23 Original line number Diff line number Diff line Loading @@ -7879,9 +7879,6 @@ static int _ipa_suspend_resume_pipe(enum ipa_client_type client, bool suspend) void ipa3_force_close_coal(void) { struct ipahal_imm_cmd_pyld *cmd_pyld = NULL; struct ipahal_imm_cmd_register_write reg_write_cmd = { 0 }; struct ipahal_reg_valmask valmask; struct ipa3_desc desc; int ep_idx; Loading @@ -7889,28 +7886,11 @@ void ipa3_force_close_coal(void) if (ep_idx == IPA_EP_NOT_ALLOCATED || (!ipa3_ctx->ep[ep_idx].valid)) return; reg_write_cmd.skip_pipeline_clear = false; reg_write_cmd.pipeline_clear_options = IPAHAL_HPS_CLEAR; reg_write_cmd.offset = ipahal_get_reg_ofst(IPA_AGGR_FORCE_CLOSE); ipahal_get_aggr_force_close_valmask(ep_idx, &valmask); reg_write_cmd.value = valmask.val; reg_write_cmd.value_mask = valmask.mask; cmd_pyld = ipahal_construct_imm_cmd(IPA_IMM_CMD_REGISTER_WRITE, ®_write_cmd, false); if (!cmd_pyld) { IPAERR("fail construct register_write imm cmd\n"); ipa_assert(); return; } ipa3_init_imm_cmd_desc(&desc, cmd_pyld); ipa3_init_imm_cmd_desc(&desc, ipa3_ctx->coal_cmd_pyld); IPADBG("Sending 1 descriptor for coal force close\n"); if (ipa3_send_cmd_timeout(1, &desc, IPA_DMA_TASK_FOR_GSI_TIMEOUT_MSEC)) { IPAERR("ipa3_send_cmd failed\n"); ipa_assert(); } ipahal_destroy_imm_cmd(cmd_pyld); if (ipa3_send_cmd(1, &desc)) IPADBG("ipa3_send_cmd timedout\n"); } int ipa3_suspend_apps_pipes(bool suspend) Loading Loading @@ -8042,6 +8022,39 @@ void ipa3_free_dma_task_for_gsi(void) memset(&ipa3_ctx->dma_task_info, 0, sizeof(ipa3_ctx->dma_task_info)); } int ipa3_allocate_coal_close_frame(void) { struct ipahal_imm_cmd_register_write reg_write_cmd = { 0 }; struct ipahal_reg_valmask valmask; int ep_idx; ep_idx = ipa3_get_ep_mapping(IPA_CLIENT_APPS_WAN_COAL_CONS); if (ep_idx == IPA_EP_NOT_ALLOCATED) return 0; IPADBG("Allocate coal close frame cmd\n"); reg_write_cmd.skip_pipeline_clear = false; reg_write_cmd.pipeline_clear_options = IPAHAL_HPS_CLEAR; reg_write_cmd.offset = ipahal_get_reg_ofst(IPA_AGGR_FORCE_CLOSE); ipahal_get_aggr_force_close_valmask(ep_idx, &valmask); reg_write_cmd.value = valmask.val; reg_write_cmd.value_mask = valmask.mask; ipa3_ctx->coal_cmd_pyld = ipahal_construct_imm_cmd(IPA_IMM_CMD_REGISTER_WRITE, ®_write_cmd, false); if (!ipa3_ctx->coal_cmd_pyld) { IPAERR("fail construct register_write imm cmd\n"); ipa_assert(); return 0; } return 0; } void ipa3_free_coal_close_frame(void) { if (ipa3_ctx->coal_cmd_pyld) ipahal_destroy_imm_cmd(ipa3_ctx->coal_cmd_pyld); } /** * ipa3_inject_dma_task_for_gsi()- Send DMA_TASK to IPA for GSI stop channel * Loading Loading
drivers/platform/msm/ipa/ipa_v3/ipa.c +8 −0 Original line number Diff line number Diff line Loading @@ -6002,6 +6002,12 @@ static int ipa3_post_init(const struct ipa3_plat_drv_res *resource_p, goto fail_dma_task; } result = ipa3_allocate_coal_close_frame(); if (result) { IPAERR("failed to allocate coal frame cmd\n"); goto fail_coal_frame; } if (ipa3_nat_ipv6ct_init_devices()) { IPAERR("unable to init NAT and IPv6CT devices\n"); result = -ENODEV; Loading Loading @@ -6204,6 +6210,8 @@ static int ipa3_post_init(const struct ipa3_plat_drv_res *resource_p, fail_allok_pkt_init: ipa3_nat_ipv6ct_destroy_devices(); fail_nat_ipv6ct_init_dev: ipa3_free_coal_close_frame(); fail_coal_frame: ipa3_free_dma_task_for_gsi(); fail_dma_task: fail_init_hw: Loading
drivers/platform/msm/ipa/ipa_v3/ipa_dp.c +11 −4 Original line number Diff line number Diff line Loading @@ -2030,7 +2030,6 @@ static void ipa3_replenish_rx_page_recycle(struct ipa3_sys_context *sys) rx_pkt = sys->repl->cache[curr_wq]; curr_wq = (++curr_wq == sys->repl->capacity) ? 0 : curr_wq; atomic_set(&sys->repl->head_idx, curr_wq); } dma_sync_single_for_device(ipa3_ctx->pdev, Loading Loading @@ -2068,6 +2067,7 @@ static void ipa3_replenish_rx_page_recycle(struct ipa3_sys_context *sys) if (ret == GSI_STATUS_SUCCESS) { /* ensure write is done before setting head index */ mb(); atomic_set(&sys->repl->head_idx, curr_wq); atomic_set(&sys->page_recycle_repl->head_idx, curr); sys->len = rx_len_cached; } else { Loading Loading @@ -4926,9 +4926,12 @@ int ipa3_rx_poll(u32 clnt_hdl, int weight) } cnt += weight - remain_aggr_weight * IPA_WAN_AGGR_PKT_CNT; /* call repl_hdlr before napi_reschedule / napi_complete */ if (cnt) ep->sys->repl_hdlr(ep->sys); if (cnt < weight) { /* When not able to replenish enough descriptors pipe wait * until minimum number descripotrs to replish. */ if (cnt < weight && ep->sys->len > IPA_DEFAULT_SYS_YELLOW_WM) { napi_complete(ep->sys->napi_obj); ret = ipa3_rx_switch_to_intr_mode(ep->sys); if (ret == -GSI_STATUS_PENDING_IRQ && Loading @@ -4939,6 +4942,10 @@ int ipa3_rx_poll(u32 clnt_hdl, int weight) ipa_pm_deferred_deactivate(ep->sys->pm_hdl); else ipa3_dec_client_disable_clks_no_block(&log); } else { cnt = weight; IPADBG_LOW("Client = %d not replenished free descripotrs\n", ep->client); } return cnt; Loading
drivers/platform/msm/ipa/ipa_v3/ipa_i.h +4 −0 Original line number Diff line number Diff line Loading @@ -1816,6 +1816,7 @@ struct ipa3_pc_mbox_data { * @wdi3_ctx: IPA wdi3 context * @gsi_info: channel/protocol info for GSI offloading uC stats * IPA context - holds all relevant info about IPA driver and its state * @coal_cmd_pyld: holds the coslescing close frame command payload */ struct ipa3_context { struct ipa3_char_device_context cdev; Loading Loading @@ -1987,6 +1988,7 @@ struct ipa3_context { gsi_info[IPA_HW_PROTOCOL_MAX]; bool ipa_mhi_proxy; bool ipa_wan_skb_page; struct ipahal_imm_cmd_pyld *coal_cmd_pyld; }; struct ipa3_plat_drv_res { Loading Loading @@ -3053,6 +3055,8 @@ void ipa3_disable_prefetch(enum ipa_client_type client); int ipa3_alloc_common_event_ring(void); int ipa3_allocate_dma_task_for_gsi(void); void ipa3_free_dma_task_for_gsi(void); int ipa3_allocate_coal_close_frame(void); void ipa3_free_coal_close_frame(void); int ipa3_set_clock_plan_from_pm(int idx); void __ipa_gsi_irq_rx_scedule_poll(struct ipa3_sys_context *sys); int ipa3_tz_unlock_reg(struct ipa_tz_unlock_reg_info *reg_info, u16 num_regs); Loading
drivers/platform/msm/ipa/ipa_v3/ipa_utils.c +36 −23 Original line number Diff line number Diff line Loading @@ -7879,9 +7879,6 @@ static int _ipa_suspend_resume_pipe(enum ipa_client_type client, bool suspend) void ipa3_force_close_coal(void) { struct ipahal_imm_cmd_pyld *cmd_pyld = NULL; struct ipahal_imm_cmd_register_write reg_write_cmd = { 0 }; struct ipahal_reg_valmask valmask; struct ipa3_desc desc; int ep_idx; Loading @@ -7889,28 +7886,11 @@ void ipa3_force_close_coal(void) if (ep_idx == IPA_EP_NOT_ALLOCATED || (!ipa3_ctx->ep[ep_idx].valid)) return; reg_write_cmd.skip_pipeline_clear = false; reg_write_cmd.pipeline_clear_options = IPAHAL_HPS_CLEAR; reg_write_cmd.offset = ipahal_get_reg_ofst(IPA_AGGR_FORCE_CLOSE); ipahal_get_aggr_force_close_valmask(ep_idx, &valmask); reg_write_cmd.value = valmask.val; reg_write_cmd.value_mask = valmask.mask; cmd_pyld = ipahal_construct_imm_cmd(IPA_IMM_CMD_REGISTER_WRITE, ®_write_cmd, false); if (!cmd_pyld) { IPAERR("fail construct register_write imm cmd\n"); ipa_assert(); return; } ipa3_init_imm_cmd_desc(&desc, cmd_pyld); ipa3_init_imm_cmd_desc(&desc, ipa3_ctx->coal_cmd_pyld); IPADBG("Sending 1 descriptor for coal force close\n"); if (ipa3_send_cmd_timeout(1, &desc, IPA_DMA_TASK_FOR_GSI_TIMEOUT_MSEC)) { IPAERR("ipa3_send_cmd failed\n"); ipa_assert(); } ipahal_destroy_imm_cmd(cmd_pyld); if (ipa3_send_cmd(1, &desc)) IPADBG("ipa3_send_cmd timedout\n"); } int ipa3_suspend_apps_pipes(bool suspend) Loading Loading @@ -8042,6 +8022,39 @@ void ipa3_free_dma_task_for_gsi(void) memset(&ipa3_ctx->dma_task_info, 0, sizeof(ipa3_ctx->dma_task_info)); } int ipa3_allocate_coal_close_frame(void) { struct ipahal_imm_cmd_register_write reg_write_cmd = { 0 }; struct ipahal_reg_valmask valmask; int ep_idx; ep_idx = ipa3_get_ep_mapping(IPA_CLIENT_APPS_WAN_COAL_CONS); if (ep_idx == IPA_EP_NOT_ALLOCATED) return 0; IPADBG("Allocate coal close frame cmd\n"); reg_write_cmd.skip_pipeline_clear = false; reg_write_cmd.pipeline_clear_options = IPAHAL_HPS_CLEAR; reg_write_cmd.offset = ipahal_get_reg_ofst(IPA_AGGR_FORCE_CLOSE); ipahal_get_aggr_force_close_valmask(ep_idx, &valmask); reg_write_cmd.value = valmask.val; reg_write_cmd.value_mask = valmask.mask; ipa3_ctx->coal_cmd_pyld = ipahal_construct_imm_cmd(IPA_IMM_CMD_REGISTER_WRITE, ®_write_cmd, false); if (!ipa3_ctx->coal_cmd_pyld) { IPAERR("fail construct register_write imm cmd\n"); ipa_assert(); return 0; } return 0; } void ipa3_free_coal_close_frame(void) { if (ipa3_ctx->coal_cmd_pyld) ipahal_destroy_imm_cmd(ipa3_ctx->coal_cmd_pyld); } /** * ipa3_inject_dma_task_for_gsi()- Send DMA_TASK to IPA for GSI stop channel * Loading