Merge "msm: npu: Use worker thread to update thermal state" (745f643d) · Commits · e / devices / android_kernel_xiaomi_nabu

drivers/media/platform/msm/npu/npu_common.h

+1 −0

Original line number	Diff line number	Diff line
		@@ -319,6 +319,7 @@ irqreturn_t npu_wdg_intr_hdlr(int irq, void *ptr);

		int npu_set_uc_power_level(struct npu_device *npu_dev,
		uint32_t pwr_level);
		int npu_set_power_level(struct npu_device *npu_dev, bool notify_cxlimit);

		int enable_fw(struct npu_device *npu_dev);
		void disable_fw(struct npu_device *npu_dev);

drivers/media/platform/msm/npu/npu_dbg.c

+80 −1

Original line number	Diff line number	Diff line
		@@ -17,7 +17,7 @@
		* Function Definitions - Debug
		* -------------------------------------------------------------------------
		*/
		void npu_dump_debug_timeout_stats(struct npu_device *npu_dev)
		static void npu_dump_debug_timeout_stats(struct npu_device *npu_dev)
		{
		uint32_t reg_val;

		@@ -28,3 +28,82 @@ void npu_dump_debug_timeout_stats(struct npu_device *npu_dev)
		reg_val = REGR(npu_dev, REG_NPU_FW_DEBUG_DATA);
		NPU_INFO("fw jobs aco parser debug = %d\n", reg_val);
		}

		void npu_dump_ipc_packet(struct npu_device npu_dev, void cmd_ptr)
		{
		int32_t ptr = (int32_t )cmd_ptr;
		uint32_t cmd_pkt_size = 0;
		int i;

		cmd_pkt_size = ((uint32_t )cmd_ptr);

		NPU_ERR("IPC packet size %d content:\n", cmd_pkt_size);
		for (i = 0; i < cmd_pkt_size/4; i++)
		NPU_ERR("%x\n", ptr[i]);
		}

		static void npu_dump_ipc_queue(struct npu_device *npu_dev, uint32_t target_que)
		{
		struct hfi_queue_header queue;
		size_t offset = (size_t)IPC_ADDR +
		sizeof(struct hfi_queue_tbl_header) +
		target_que * sizeof(struct hfi_queue_header);
		int32_t ptr = (int32_t )&queue;
		size_t content_off;
		uint32_t *content;
		int i;

		MEMR(npu_dev, (void )((size_t)offset), (uint8_t )&queue,
		HFI_QUEUE_HEADER_SIZE);

		NPU_ERR("DUMP IPC queue %d:\n", target_que);
		NPU_ERR("Header size %d:\n", HFI_QUEUE_HEADER_SIZE);
		NPU_ERR("Content size %d:\n", queue.qhdr_q_size);
		NPU_ERR("============QUEUE HEADER=============\n");
		for (i = 0; i < HFI_QUEUE_HEADER_SIZE/4; i++)
		NPU_ERR("%x\n", ptr[i]);

		content_off = (size_t)IPC_ADDR + queue.qhdr_start_offset;
		content = kzalloc(queue.qhdr_q_size, GFP_KERNEL);
		if (!content) {
		NPU_ERR("failed to allocate IPC queue content buffer\n");
		return;
		}

		MEMR(npu_dev, (void *)content_off, content, queue.qhdr_q_size);
		NPU_ERR("============QUEUE CONTENT=============\n");
		for (i = 0; i < queue.qhdr_q_size/4; i++)
		NPU_ERR("%x\n", content[i]);

		NPU_ERR("DUMP IPC queue %d END\n", target_que);
		kfree(content);
		}

		static void npu_dump_dbg_registers(struct npu_device *npu_dev)
		{
		uint32_t reg_val, reg_addr;
		int i;

		NPU_ERR("============Debug Registers=============\n");
		reg_addr = NPU_GPR0;
		for (i = 0; i < 16; i++) {
		reg_val = REGR(npu_dev, reg_addr);
		NPU_ERR("npu dbg register %d : 0x%x\n", i, reg_val);
		reg_addr += 4;
		}
		}

		static void npu_dump_all_ipc_queue(struct npu_device *npu_dev)
		{
		int i;

		for (i = 0; i < NPU_HFI_NUMBER_OF_QS; i++)
		npu_dump_ipc_queue(npu_dev, i);
		}

		void npu_dump_debug_info(struct npu_device *npu_dev)
		{
		npu_dump_debug_timeout_stats(npu_dev);
		npu_dump_dbg_registers(npu_dev);
		npu_dump_all_ipc_queue(npu_dev);
		}

drivers/media/platform/msm/npu/npu_dev.c

+2 −10

Original line number	Diff line number	Diff line
		@@ -101,7 +101,6 @@ static int npu_suspend(struct platform_device *dev, pm_message_t state);
		static int npu_resume(struct platform_device *dev);
		static int __init npu_init(void);
		static void __exit npu_exit(void);
		static int npu_set_power_level(struct npu_device *npu_dev, bool notify_cxlimit);

		/* -------------------------------------------------------------------------
		* File Scope Variables
		@@ -458,7 +457,7 @@ static uint32_t npu_calc_power_level(struct npu_device *npu_dev)
		return ret_level;
		}

		static int npu_set_power_level(struct npu_device *npu_dev, bool notify_cxlimit)
		int npu_set_power_level(struct npu_device *npu_dev, bool notify_cxlimit)
		{
		struct npu_pwrctrl *pwr = &npu_dev->pwrctrl;
		struct npu_pwrlevel *pwrlevel;
		@@ -764,23 +763,16 @@ static int
		npu_set_cur_state(struct thermal_cooling_device *cdev, unsigned long state)
		{
		struct npu_device *npu_dev = cdev->devdata;
		struct npu_host_ctx *host_ctx = &npu_dev->host_ctx;
		struct npu_thermalctrl *thermal = &npu_dev->thermalctrl;
		int rc = 0;

		NPU_DBG("request state=%lu\n", state);
		if (state > thermal->max_state)
		return -EINVAL;

		mutex_lock(&host_ctx->lock);
		thermal->current_state = state;
		thermal->pwr_level = npu_power_level_from_index(npu_dev,
		thermal->max_state - state);

		rc = npu_set_power_level(npu_dev, true);
		mutex_unlock(&host_ctx->lock);

		return rc;
		return npu_host_update_power(npu_dev);
		}

		/* -------------------------------------------------------------------------

drivers/media/platform/msm/npu/npu_hw_access.c

+0 −3

Original line number	Diff line number	Diff line
		@@ -102,7 +102,6 @@ void npu_mem_write(struct npu_device npu_dev, void dst, void *src,
		uint32_t i = 0;
		uint32_t num = 0;

		NPU_DBG("write dst_off %zx size %x\n", dst_off, size);
		num = size/4;
		for (i = 0; i < num; i++) {
		writel_relaxed(src_ptr32[i], npu_dev->tcm_io.base + dst_off);
		@@ -129,8 +128,6 @@ int32_t npu_mem_read(struct npu_device npu_dev, void src, void *dst,
		uint32_t i = 0;
		uint32_t num = 0;

		NPU_DBG("read src_off %zx size %x\n", src_off, size);

		num = size/4;
		for (i = 0; i < num; i++) {
		out32[i] = readl_relaxed(npu_dev->tcm_io.base + src_off);

drivers/media/platform/msm/npu/npu_mgr.c

+40 −9

Original line number	Diff line number	Diff line
		@@ -36,6 +36,7 @@ static void npu_ipc_irq_work(struct work_struct *work);
		static void npu_wdg_err_irq_work(struct work_struct *work);
		static void npu_bridge_mbox_work(struct work_struct *work);
		static void npu_disable_fw_work(struct work_struct *work);
		static void npu_update_pwr_work(struct work_struct *work);
		static void turn_off_fw_logging(struct npu_device *npu_dev);
		static int wait_for_status_ready(struct npu_device *npu_dev,
		uint32_t status_reg, uint32_t status_bits);
		@@ -542,6 +543,33 @@ static int npu_notifier_cb(struct notifier_block *this, unsigned long code,
		return ret;
		}

		static void npu_update_pwr_work(struct work_struct *work)
		{
		int ret;
		struct npu_host_ctx *host_ctx;
		struct npu_device *npu_dev;

		host_ctx = container_of(work, struct npu_host_ctx, update_pwr_work);
		npu_dev = container_of(host_ctx, struct npu_device, host_ctx);

		mutex_lock(&host_ctx->lock);
		ret = npu_set_power_level(npu_dev, true);
		mutex_unlock(&host_ctx->lock);

		if (ret)
		NPU_ERR("Update power level failed %d\n", ret);
		}

		int npu_host_update_power(struct npu_device *npu_dev)
		{
		struct npu_host_ctx *host_ctx = &npu_dev->host_ctx;

		if (host_ctx->wq)
		queue_work(host_ctx->wq, &host_ctx->update_pwr_work);

		return 0;
		}

		int npu_host_init(struct npu_device *npu_dev)
		{
		int sts = 0;
		@@ -575,6 +603,7 @@ int npu_host_init(struct npu_device *npu_dev)
		INIT_WORK(&host_ctx->wdg_err_irq_work, npu_wdg_err_irq_work);
		INIT_WORK(&host_ctx->bridge_mbox_work, npu_bridge_mbox_work);
		INIT_WORK(&host_ctx->load_fw_work, npu_load_fw_work);
		INIT_WORK(&host_ctx->update_pwr_work, npu_update_pwr_work);
		INIT_DELAYED_WORK(&host_ctx->disable_fw_work,
		npu_disable_fw_work);
		}
		@@ -954,10 +983,8 @@ static int npu_notify_aop(struct npu_device *npu_dev, bool on)
		struct qmp_pkt pkt;
		int buf_size, rc = 0;

		if (!npu_dev->mbox_aop \|\| !npu_dev->mbox_aop->chan) {
		NPU_WARN("aop mailbox channel is not available\n");
		if (!npu_dev->mbox_aop \|\| !npu_dev->mbox_aop->chan)
		return 0;
		}

		buf_size = scnprintf(buf, MAX_LEN, "{class: bcm, res: npu_on, val: %d}",
		on ? 1 : 0);
		@@ -1668,6 +1695,7 @@ int32_t npu_host_load_network(struct npu_client *client,
		mutex_lock(&host_ctx->lock);
		if (!ret) {
		NPU_ERR("NPU_IPC_CMD_LOAD time out\n");
		npu_dump_debug_info(npu_dev);
		ret = -ETIMEDOUT;
		goto error_free_network;
		} else if (ret < 0) {
		@@ -1794,6 +1822,7 @@ int32_t npu_host_load_network_v2(struct npu_client *client,

		if (!ret) {
		NPU_ERR("npu: NPU_IPC_CMD_LOAD time out\n");
		npu_dump_debug_info(npu_dev);
		ret = -ETIMEDOUT;
		goto error_load_network;
		}
		@@ -1908,6 +1937,7 @@ int32_t npu_host_unload_network(struct npu_client *client,

		if (!ret) {
		NPU_ERR("npu: NPU_IPC_CMD_UNLOAD time out\n");
		npu_dump_debug_info(npu_dev);
		network->cmd_pending = false;
		ret = -ETIMEDOUT;
		goto free_network;
		@@ -2032,9 +2062,9 @@ int32_t npu_host_exec_network(struct npu_client *client,

		mutex_lock(&host_ctx->lock);
		if (!ret) {
		NPU_ERR("npu: NPU_IPC_CMD_EXECUTE time out\n");
		/* dump debug stats */
		npu_dump_debug_timeout_stats(npu_dev);
		NPU_ERR("npu: %x NPU_IPC_CMD_EXECUTE time out\n",
		network->id);
		npu_dump_debug_info(npu_dev);
		network->cmd_pending = false;
		ret = -ETIMEDOUT;
		goto exec_done;
		@@ -2166,9 +2196,9 @@ int32_t npu_host_exec_network_v2(struct npu_client *client,

		mutex_lock(&host_ctx->lock);
		if (!ret) {
		NPU_ERR("npu: NPU_IPC_CMD_EXECUTE_V2 time out\n");
		/* dump debug stats */
		npu_dump_debug_timeout_stats(npu_dev);
		NPU_ERR("npu: %x NPU_IPC_CMD_EXECUTE_V2 time out\n",
		network->id);
		npu_dump_debug_info(npu_dev);
		network->cmd_pending = false;
		ret = -ETIMEDOUT;
		goto free_exec_packet;
		@@ -2249,6 +2279,7 @@ int32_t npu_host_loopback_test(struct npu_device *npu_dev)

		if (!ret) {
		NPU_ERR("npu: NPU_IPC_CMD_LOOPBACK time out\n");
		npu_dump_debug_info(npu_dev);
		ret = -ETIMEDOUT;
		} else if (ret < 0) {
		NPU_ERR("Wait for loopback done interrupted by signal\n");