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Commit 72eb4cca authored by Huang Shijie's avatar Huang Shijie Committed by Shawn Guo
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ARM: dts: imx6q{dl}: fix the pin conflict between SPI and WEIM



In the imx6q-sabreauto and imx6dl-sabreauto boards,
the pin MX6Q{DL}_PAD_EIM_D19 is used as a GPIO for SPI NOR, but
it is used as a data pin for the WEIM NOR.

In order to fix the conflict, this patch removes the pin from the hog,
and adds a new board-level pinctrl: pinctrl_ecspi1_sabreauto.

The SPI NOR selects this pinctrl_ecspi1_sabreauto when it is enabled.

Signed-off-by: default avatarHuang Shijie <b32955@freescale.com>
Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
parent 85bf6d4e
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+8 −1
Original line number Diff line number Diff line
@@ -25,6 +25,13 @@
			fsl,pins = <
				MX6DL_PAD_NANDF_CS2__GPIO6_IO15 0x80000000
				MX6DL_PAD_SD2_DAT2__GPIO1_IO13  0x80000000
			>;
		};
	};

	ecspi1 {
		pinctrl_ecspi1_sabreauto: ecspi1-sabreauto {
			fsl,pins = <
				MX6DL_PAD_EIM_D19__GPIO3_IO19  0x80000000
			>;
		};
+8 −1
Original line number Diff line number Diff line
@@ -29,6 +29,13 @@
			fsl,pins = <
				MX6Q_PAD_NANDF_CS2__GPIO6_IO15 0x80000000
				MX6Q_PAD_SD2_DAT2__GPIO1_IO13  0x80000000
			>;
		};
	};

	ecspi1 {
		pinctrl_ecspi1_sabreauto: ecspi1-sabreauto {
			fsl,pins = <
				MX6Q_PAD_EIM_D19__GPIO3_IO19  0x80000000
			>;
		};
+1 −1
Original line number Diff line number Diff line
@@ -20,7 +20,7 @@
	fsl,spi-num-chipselects = <1>;
	cs-gpios = <&gpio3 19 0>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi1_1>;
	pinctrl-0 = <&pinctrl_ecspi1_1 &pinctrl_ecspi1_sabreauto>;
	status = "disabled"; /* pin conflict with WEIM NOR */

	flash: m25p80@0 {