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Commit 6fc9754d authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "Merge android-4.14-q.146 (a3d62590) into msm-4.14"

parents 11c14955 3b572c9b

Makefile

+1 −1
Original line number Diff line number Diff line 
# SPDX-License-Identifier: GPL-2.0

VERSION = 4

PATCHLEVEL = 14

SUBLEVEL = 141

SUBLEVEL = 146

EXTRAVERSION =

NAME = Petit Gorille

arch/arm/boot/dts/dra74x-mmc-iodelay.dtsi

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Original line number Diff line number Diff line
@@ -32,7 +32,7 @@ 
 *

 * Datamanual Revisions:

 *

 * AM572x Silicon Revision 2.0: SPRS953B, Revised November 2016

 * AM572x Silicon Revision 2.0: SPRS953F, Revised May 2019

 * AM572x Silicon Revision 1.1: SPRS915R, Revised November 2016

 *

 */
@@ -229,45 +229,45 @@ 


	mmc3_pins_default: mmc3_pins_default {

		pinctrl-single,pins = <

			DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_clk.mmc3_clk */

			DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */

			DRA7XX_CORE_IOPAD(0x3784, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat0.mmc3_dat0 */

			DRA7XX_CORE_IOPAD(0x3788, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat1.mmc3_dat1 */

			DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat2.mmc3_dat2 */

			DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat3.mmc3_dat3 */

			DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_clk.mmc3_clk */

			DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */

			DRA7XX_CORE_IOPAD(0x3784, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat0.mmc3_dat0 */

			DRA7XX_CORE_IOPAD(0x3788, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat1.mmc3_dat1 */

			DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat2.mmc3_dat2 */

			DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat3.mmc3_dat3 */

		>;

	};



	mmc3_pins_hs: mmc3_pins_hs {

		pinctrl-single,pins = <

			DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_clk.mmc3_clk */

			DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */

			DRA7XX_CORE_IOPAD(0x3784, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat0.mmc3_dat0 */

			DRA7XX_CORE_IOPAD(0x3788, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat1.mmc3_dat1 */

			DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat2.mmc3_dat2 */

			DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat3.mmc3_dat3 */

			DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_clk.mmc3_clk */

			DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */

			DRA7XX_CORE_IOPAD(0x3784, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat0.mmc3_dat0 */

			DRA7XX_CORE_IOPAD(0x3788, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat1.mmc3_dat1 */

			DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat2.mmc3_dat2 */

			DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat3.mmc3_dat3 */

		>;

	};



	mmc3_pins_sdr12: mmc3_pins_sdr12 {

		pinctrl-single,pins = <

			DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_clk.mmc3_clk */

			DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */

			DRA7XX_CORE_IOPAD(0x3784, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat0.mmc3_dat0 */

			DRA7XX_CORE_IOPAD(0x3788, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat1.mmc3_dat1 */

			DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat2.mmc3_dat2 */

			DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat3.mmc3_dat3 */

			DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_clk.mmc3_clk */

			DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */

			DRA7XX_CORE_IOPAD(0x3784, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat0.mmc3_dat0 */

			DRA7XX_CORE_IOPAD(0x3788, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat1.mmc3_dat1 */

			DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat2.mmc3_dat2 */

			DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat3.mmc3_dat3 */

		>;

	};



	mmc3_pins_sdr25: mmc3_pins_sdr25 {

		pinctrl-single,pins = <

			DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_clk.mmc3_clk */

			DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */

			DRA7XX_CORE_IOPAD(0x3784, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat0.mmc3_dat0 */

			DRA7XX_CORE_IOPAD(0x3788, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat1.mmc3_dat1 */

			DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat2.mmc3_dat2 */

			DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat3.mmc3_dat3 */

			DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_clk.mmc3_clk */

			DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */

			DRA7XX_CORE_IOPAD(0x3784, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat0.mmc3_dat0 */

			DRA7XX_CORE_IOPAD(0x3788, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat1.mmc3_dat1 */

			DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat2.mmc3_dat2 */

			DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat3.mmc3_dat3 */

		>;

	};

arch/arm/common/Kconfig

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@@ -15,7 +15,3 @@ config SHARP_PARAM 


config SHARP_SCOOP

	bool
 


config FIQ_GLUE

	bool

	select FIQ

arch/arm/common/Makefile

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@@ -5,7 +5,6 @@ 


obj-y				+= firmware.o



obj-$(CONFIG_FIQ_GLUE)		+= fiq_glue.o fiq_glue_setup.o

obj-$(CONFIG_SA1111)		+= sa1111.o

obj-$(CONFIG_DMABOUNCE)		+= dmabounce.o

obj-$(CONFIG_SHARP_LOCOMO)	+= locomo.o

arch/arm/common/fiq_glue.S

deleted100644 → 0
+0 −118
Original line number Diff line number Diff line 
/*

 * Copyright (C) 2008 Google, Inc.

 *

 * This software is licensed under the terms of the GNU General Public

 * License version 2, as published by the Free Software Foundation, and

 * may be copied, distributed, and modified under those terms.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 */



#include <linux/linkage.h>

#include <asm/assembler.h>



		.text



		.global fiq_glue_end



		/* fiq stack: r0-r15,cpsr,spsr of interrupted mode */



ENTRY(fiq_glue)

		/* store pc, cpsr from previous mode, reserve space for spsr */

		mrs	r12, spsr

		sub	lr, lr, #4

		subs	r10, #1

		bne	nested_fiq



		str	r12, [sp, #-8]!

		str	lr, [sp, #-4]!



		/* store r8-r14 from previous mode */

		sub	sp, sp, #(7 * 4)

		stmia	sp, {r8-r14}^

		nop



		/* store r0-r7 from previous mode */

		stmfd	sp!, {r0-r7}



		/* setup func(data,regs) arguments */

		mov	r0, r9

		mov	r1, sp

		mov	r3, r8



		mov	r7, sp



		/* Get sp and lr from non-user modes */

		and	r4, r12, #MODE_MASK

		cmp	r4, #USR_MODE

		beq	fiq_from_usr_mode



		mov	r7, sp

		orr	r4, r4, #(PSR_I_BIT | PSR_F_BIT)

		msr	cpsr_c, r4

		str	sp, [r7, #(4 * 13)]

		str	lr, [r7, #(4 * 14)]

		mrs	r5, spsr

		str	r5, [r7, #(4 * 17)]



		cmp	r4, #(SVC_MODE | PSR_I_BIT | PSR_F_BIT)

		/* use fiq stack if we reenter this mode */

		subne	sp, r7, #(4 * 3)



fiq_from_usr_mode:

		msr	cpsr_c, #(SVC_MODE | PSR_I_BIT | PSR_F_BIT)

		mov	r2, sp

		sub	sp, r7, #12

		stmfd	sp!, {r2, ip, lr}

		/* call func(data,regs) */

		blx	r3

		ldmfd	sp, {r2, ip, lr}

		mov	sp, r2



		/* restore/discard saved state */

		cmp	r4, #USR_MODE

		beq	fiq_from_usr_mode_exit



		msr	cpsr_c, r4

		ldr	sp, [r7, #(4 * 13)]

		ldr	lr, [r7, #(4 * 14)]

		msr	spsr_cxsf, r5



fiq_from_usr_mode_exit:

		msr	cpsr_c, #(FIQ_MODE | PSR_I_BIT | PSR_F_BIT)



		ldmfd	sp!, {r0-r7}

		ldr	lr, [sp, #(4 * 7)]

		ldr	r12, [sp, #(4 * 8)]

		add	sp, sp, #(10 * 4)

exit_fiq:

		msr	spsr_cxsf, r12

		add	r10, #1

		cmp	r11, #0

		moveqs	pc, lr

		bx	r11 /* jump to custom fiq return function */



nested_fiq:

		orr	r12, r12, #(PSR_F_BIT)

		b	exit_fiq



fiq_glue_end:



ENTRY(fiq_glue_setup) /* func, data, sp, smc call number */

		stmfd		sp!, {r4}

		mrs		r4, cpsr

		msr		cpsr_c, #(FIQ_MODE | PSR_I_BIT | PSR_F_BIT)

		movs		r8, r0

		mov		r9, r1

		mov		sp, r2

		mov		r11, r3

		moveq		r10, #0

		movne		r10, #1

		msr		cpsr_c, r4

		ldmfd		sp!, {r4}

		bx		lr