Merge "clk: qcom: gcc: Update pcie aux clks to 19.2Mhz for all corners" (6f41934c) · Commits · e / devices / android_kernel_xiaomi_nabu

drivers/clk/qcom/gcc-sm8150.c

+2 −4

Original line number	Diff line number	Diff line
		@@ -512,8 +512,7 @@ static struct clk_rcg2 gcc_pcie_0_aux_clk_src = {
		.vdd_class = &vdd_cx,
		.num_rate_max = VDD_NUM,
		.rate_max = (unsigned long[VDD_NUM]) {
		[VDD_MIN] = 9600000,
		[VDD_LOW] = 19200000},
		[VDD_MIN] = 19200000},
		},
		};

		@@ -532,8 +531,7 @@ static struct clk_rcg2 gcc_pcie_1_aux_clk_src = {
		.vdd_class = &vdd_cx,
		.num_rate_max = VDD_NUM,
		.rate_max = (unsigned long[VDD_NUM]) {
		[VDD_MIN] = 9600000,
		[VDD_LOW] = 19200000},
		[VDD_MIN] = 19200000},
		},
		};