RISC-V: Device, timer, IRQs, and the SBI

/*

 * Copyright (C) 2009 Chen Liqin <liqin.chen@sunplusct.com>

 * Copyright (C) 2016 Regents of the University of California

 *

 *   This program is free software; you can redistribute it and/or

 *   modify it under the terms of the GNU General Public License

 *   as published by the Free Software Foundation, version 2.

 *

 *   This program is distributed in the hope that it will be useful,

 *   but WITHOUT ANY WARRANTY; without even the implied warranty of

 *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 *   GNU General Public License for more details.

 */

#ifndef _ASM_RISCV_DELAY_H

#define _ASM_RISCV_DELAY_H

extern unsigned long riscv_timebase;

#define udelay udelay

extern void udelay(unsigned long usecs);

#define ndelay ndelay

extern void ndelay(unsigned long nsecs);

extern void __delay(unsigned long cycles);

#endif /* _ASM_RISCV_DELAY_H */

/*

 * Copyright (C) 2003-2004 Hewlett-Packard Co

 *	David Mosberger-Tang <davidm@hpl.hp.com>

 * Copyright (C) 2012 ARM Ltd.

 * Copyright (C) 2016 SiFive, Inc.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program.  If not, see <http://www.gnu.org/licenses/>.

 */

#ifndef __ASM_RISCV_DMA_MAPPING_H

#define __ASM_RISCV_DMA_MAPPING_H

/* Use ops->dma_mapping_error (if it exists) or assume success */

// #undef DMA_ERROR_CODE

static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)

{

	return &dma_noop_ops;

}

static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)

{

	if (!dev->dma_mask)

		return false;

	return addr + size - 1 <= *dev->dma_mask;

}

#endif	/* __ASM_RISCV_DMA_MAPPING_H */

/*

 * Copyright (C) 2012 Regents of the University of California

 * Copyright (C) 2017 SiFive

 *

 *   This program is free software; you can redistribute it and/or

 *   modify it under the terms of the GNU General Public License

 *   as published by the Free Software Foundation, version 2.

 *

 *   This program is distributed in the hope that it will be useful,

 *   but WITHOUT ANY WARRANTY; without even the implied warranty of

 *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 *   GNU General Public License for more details.

 */

#ifndef _ASM_RISCV_IRQ_H

#define _ASM_RISCV_IRQ_H

#define NR_IRQS         0

#define INTERRUPT_CAUSE_SOFTWARE    1

#define INTERRUPT_CAUSE_TIMER       5

#define INTERRUPT_CAUSE_EXTERNAL    9

void riscv_timer_interrupt(void);

#include <asm-generic/irq.h>

#endif /* _ASM_RISCV_IRQ_H */

/*

 * Copyright (C) 2012 Regents of the University of California

 *

 *   This program is free software; you can redistribute it and/or

 *   modify it under the terms of the GNU General Public License

 *   as published by the Free Software Foundation, version 2.

 *

 *   This program is distributed in the hope that it will be useful,

 *   but WITHOUT ANY WARRANTY; without even the implied warranty of

 *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 *   GNU General Public License for more details.

 */

#ifndef _ASM_RISCV_IRQFLAGS_H

#define _ASM_RISCV_IRQFLAGS_H

#include <asm/processor.h>

#include <asm/csr.h>

/* read interrupt enabled status */

static inline unsigned long arch_local_save_flags(void)

{

	return csr_read(sstatus);

}

/* unconditionally enable interrupts */

static inline void arch_local_irq_enable(void)

{

	csr_set(sstatus, SR_IE);

}

/* unconditionally disable interrupts */

static inline void arch_local_irq_disable(void)

{

	csr_clear(sstatus, SR_IE);

}

/* get status and disable interrupts */

static inline unsigned long arch_local_irq_save(void)

{

	return csr_read_clear(sstatus, SR_IE);

}

/* test flags */

static inline int arch_irqs_disabled_flags(unsigned long flags)

{

	return !(flags & SR_IE);

}

/* test hardware interrupt enable bit */

static inline int arch_irqs_disabled(void)

{

	return arch_irqs_disabled_flags(arch_local_save_flags());

}

/* set interrupt enabled status */

static inline void arch_local_irq_restore(unsigned long flags)

{

	csr_set(sstatus, flags & SR_IE);

}

#endif /* _ASM_RISCV_IRQFLAGS_H */

/*

 * Copyright (C) 2016 SiFive

 *

 *   This program is free software; you can redistribute it and/or

 *   modify it under the terms of the GNU General Public License

 *   as published by the Free Software Foundation, version 2.

 *

 *   This program is distributed in the hope that it will be useful,

 *   but WITHOUT ANY WARRANTY; without even the implied warranty of

 *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 *   GNU General Public License for more details.

 */

#ifndef __ASM_RISCV_PCI_H

#define __ASM_RISCV_PCI_H

#include <linux/types.h>

#include <linux/slab.h>

#include <linux/dma-mapping.h>

#include <asm/io.h>

#define PCIBIOS_MIN_IO		0

#define PCIBIOS_MIN_MEM		0

/* RISC-V shim does not initialize PCI bus */

#define pcibios_assign_all_busses() 1

/* We do not have an IOMMU */

#define PCI_DMA_BUS_IS_PHYS 1

extern int isa_dma_bridge_buggy;

#ifdef CONFIG_PCI

static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)

{

	/* no legacy IRQ on risc-v */

	return -ENODEV;

}

static inline int pci_proc_domain(struct pci_bus *bus)

{

	/* always show the domain in /proc */

	return 1;

}

#endif  /* CONFIG_PCI */

#endif  /* __ASM_PCI_H */