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Commit 6d1f5766 authored by Monika Singh's avatar Monika Singh Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: Add crypto clock support 



Add clock support as voting has to be done from apps
to control the clocks which are needed to access HW
crypto module.

Change-Id: I04189cef95501a2865ebb94c73c9502237639e54
Signed-off-by: default avatarMonika Singh <monising@codeaurora.org>
parent 35b04fac

arch/arm64/boot/dts/qcom/trinket.dtsi

+36 −5
Original line number Diff line number Diff line
@@ -1906,10 +1906,26 @@ 
		qcom,qsee-ce-hw-instance = <0>;

		qcom,disk-encrypt-pipe-pair = <2>;

		qcom,support-fde;

		qcom,no-clock-support;

		qcom,fde-key-size;

		qcom,appsbl-qseecom-support;

		qcom,commonlib64-loaded-by-uefi;

		qcom,msm-bus,name = "qseecom-noc";

		qcom,msm-bus,num-cases = <4>;

		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps =

			<55 512 0 0>,

			<55 512 200000 400000>,

			<55 512 300000 800000>,

			<55 512 400000 1000000>;

		clock-names =

			"core_clk_src", "core_clk",

			"iface_clk", "bus_clk";

		clocks =

			<&clock_rpmcc QSEECOM_CE1_CLK>,

			<&clock_rpmcc QSEECOM_CE1_CLK>,

			<&clock_rpmcc QSEECOM_CE1_CLK>,

			<&clock_rpmcc QSEECOM_CE1_CLK>;

		qcom,ce-opp-freq = <171430000>;

		qcom,qsee-reentrancy-support = <2>;

	};
@@ -1985,8 +2001,16 @@ 
		qcom,msm-bus,vectors-KBps =

			<55 512 0 0>,

			<55 512 393600 393600>;

		clock-names =

			"core_clk_src", "core_clk",

			"iface_clk", "bus_clk";

		clocks =

			<&clock_rpmcc QCEDEV_CE1_CLK>,

			<&clock_rpmcc QCEDEV_CE1_CLK>,

			<&clock_rpmcc QCEDEV_CE1_CLK>,

			<&clock_rpmcc QCEDEV_CE1_CLK>;

		qcom,ce-opp-freq = <171430000>;

		qcom,smmu-s1-enable;

		qcom,no-clock-support;

		iommus = <&apps_smmu 0x01A6 0x0011>,

			 <&apps_smmu 0x01B6 0x0011>;

	};
@@ -2009,6 +2033,14 @@ 
		qcom,msm-bus,vectors-KBps =

			<55 512 0 0>,

			<55 512 393600 393600>;

		clock-names =

			"core_clk_src", "core_clk",

			"iface_clk", "bus_clk";

		clocks =

			<&clock_rpmcc QCRYPTO_CE1_CLK>,

			<&clock_rpmcc QCRYPTO_CE1_CLK>,

			<&clock_rpmcc QCRYPTO_CE1_CLK>,

			<&clock_rpmcc QCRYPTO_CE1_CLK>;

		qcom,use-sw-aes-cbc-ecb-ctr-algo;

		qcom,use-sw-aes-xts-algo;

		qcom,use-sw-aes-ccm-algo;
@@ -2016,7 +2048,6 @@ 
		qcom,use-sw-aead-algo;

		qcom,use-sw-hmac-algo;

		qcom,smmu-s1-enable;

		qcom,no-clock-support;

		iommus = <&apps_smmu 0x01A4 0x0011>,

			<&apps_smmu 0x01B4 0x0011>;

	};