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Commit 6c7d7879 authored by Xiaowen Wu's avatar Xiaowen Wu
Browse files

drm/msm/dp: update mode validation logic for widebus 



Update the mode validation logic by halving the mode clock when
widebus is enabled.

Change-Id: I8f060d8b60403aa5020496983bec0b3e2878b08b
Signed-off-by: default avatarXiaowen Wu <wxiaowen@codeaurora.org>
Signed-off-by: default avatarTatenda Chipeperekwa <tatendac@codeaurora.org>
parent d34ef7dc

drivers/gpu/drm/msm/dp/dp_display.c

+8 −3
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.

 * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -1959,6 +1959,7 @@ static enum drm_mode_status dp_display_validate_mode( 
	int hdis, vdis, vref, ar, _hdis, _vdis, _vref, _ar, rate;

	struct dp_display_mode dp_mode;

	bool dsc_en;

	u32 pclk_khz;



	if (!dp_display || !mode || !panel) {

		pr_err("invalid params\n");
@@ -1997,8 +1998,12 @@ static enum drm_mode_status dp_display_validate_mode( 
		goto end;

	}



	if (mode->clock > dp_display->max_pclk_khz) {

		DP_MST_DEBUG("clk:%d, max:%d\n", mode->clock,

	pclk_khz = dp_mode.timing.widebus_en ?

		(dp_mode.timing.pixel_clk_khz >> 1) :

		(dp_mode.timing.pixel_clk_khz);



	if (pclk_khz > dp_display->max_pclk_khz) {

		DP_MST_DEBUG("clk:%d, max:%d\n", pclk_khz,

				dp_display->max_pclk_khz);

		goto end;

	}