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Commit 6c468f10 authored by Lucas Stach's avatar Lucas Stach Committed by Thierry Reding
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ARM: dts: tegra: add Tegra20 NAND flash controller node 



Add basic controller device tree node to be extended by
individual boards. Use the assigned-clocks mechanism to set
NDFLASH clock to a sensible default rate of 150MHz.

Signed-off-by: default avatarLucas Stach <dev@lynxeye.de>
Signed-off-by: default avatarStefan Agner <stefan@agner.ch>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 8ab11f80

arch/arm/boot/dts/tegra20.dtsi

+15 −0
Original line number Diff line number Diff line
@@ -432,6 +432,21 @@ 
		status = "disabled";

	};



	nand-controller@70008000 {

		compatible = "nvidia,tegra20-nand";

		reg = <0x70008000 0x100>;

		#address-cells = <1>;

		#size-cells = <0>;

		interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&tegra_car TEGRA20_CLK_NDFLASH>;

		clock-names = "nand";

		resets = <&tegra_car 13>;

		reset-names = "nand";

		assigned-clocks = <&tegra_car TEGRA20_CLK_NDFLASH>;

		assigned-clock-rates = <150000000>;

		status = "disabled";

	};



	pwm: pwm@7000a000 {

		compatible = "nvidia,tegra20-pwm";

		reg = <0x7000a000 0x100>;