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Commit 6bff47be authored by Vivien Didelot's avatar Vivien Didelot Committed by David S. Miller
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net: dsa: mv88e6xxx: prefix Global 2 MGMT macros 



Prefix and document the Global 2 MGMT registers macros.

Signed-off-by: default avatarVivien Didelot <vivien.didelot@savoirfairelinux.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 067e474a

drivers/net/dsa/mv88e6xxx/global2.c

+6 −5
Original line number Diff line number Diff line
@@ -52,7 +52,7 @@ int mv88e6095_g2_mgmt_rsvd2cpu(struct mv88e6xxx_chip *chip) 
	 * addresses matching 01:80:c2:00:00:2x as MGMT.

	 */

	if (mv88e6xxx_has(chip, MV88E6XXX_FLAG_G2_MGMT_EN_2X)) {

		err = mv88e6xxx_g2_write(chip, GLOBAL2_MGMT_EN_2X, 0xffff);

		err = mv88e6xxx_g2_write(chip, MV88E6XXX_G2_MGMT_EN_2X, 0xffff);

		if (err)

			return err;

	}
@@ -61,7 +61,8 @@ int mv88e6095_g2_mgmt_rsvd2cpu(struct mv88e6xxx_chip *chip) 
	 * addresses matching 01:80:c2:00:00:0x as MGMT.

	 */

	if (mv88e6xxx_has(chip, MV88E6XXX_FLAG_G2_MGMT_EN_0X))

		return mv88e6xxx_g2_write(chip, GLOBAL2_MGMT_EN_0X, 0xffff);

		return mv88e6xxx_g2_write(chip, MV88E6XXX_G2_MGMT_EN_0X,

					  0xffff);



	return 0;

}
@@ -1056,11 +1057,11 @@ int mv88e6xxx_g2_setup(struct mv88e6xxx_chip *chip) 
	 * highest, and send all special multicast frames to the CPU

	 * port at the highest priority.

	 */

	reg = GLOBAL2_SWITCH_MGMT_FORCE_FLOW_CTRL_PRI | (0x7 << 4);

	reg = MV88E6XXX_G2_SWITCH_MGMT_FORCE_FLOW_CTL_PRI | (0x7 << 4);

	if (mv88e6xxx_has(chip, MV88E6XXX_FLAG_G2_MGMT_EN_0X) ||

	    mv88e6xxx_has(chip, MV88E6XXX_FLAG_G2_MGMT_EN_2X))

		reg |= GLOBAL2_SWITCH_MGMT_RSVD2CPU | 0x7;

	err = mv88e6xxx_g2_write(chip, GLOBAL2_SWITCH_MGMT, reg);

		reg |= MV88E6XXX_G2_SWITCH_MGMT_RSVD2CPU | 0x7;

	err = mv88e6xxx_g2_write(chip, MV88E6XXX_G2_SWITCH_MGMT, reg);

	if (err)

		return err;

drivers/net/dsa/mv88e6xxx/global2.h

+15 −8
Original line number Diff line number Diff line
@@ -22,15 +22,22 @@ 
#define GLOBAL2_INT_SOURCE	0x00

#define GLOBAL2_INT_SOURCE_WATCHDOG	15

#define GLOBAL2_INT_MASK	0x01

#define GLOBAL2_MGMT_EN_2X	0x02

#define GLOBAL2_MGMT_EN_0X	0x03



/* Offset 0x02: MGMT Enable Register 2x */

#define MV88E6XXX_G2_MGMT_EN_2X		0x02



/* Offset 0x03: MGMT Enable Register 0x */

#define MV88E6XXX_G2_MGMT_EN_0X		0x03



#define GLOBAL2_FLOW_CONTROL	0x04

#define GLOBAL2_SWITCH_MGMT	0x05

#define GLOBAL2_SWITCH_MGMT_USE_DOUBLE_TAG_DATA	BIT(15)

#define GLOBAL2_SWITCH_MGMT_PREVENT_LOOPS	BIT(14)

#define GLOBAL2_SWITCH_MGMT_FLOW_CONTROL_MSG	BIT(13)

#define GLOBAL2_SWITCH_MGMT_FORCE_FLOW_CTRL_PRI	BIT(7)

#define GLOBAL2_SWITCH_MGMT_RSVD2CPU		BIT(3)



/* Offset 0x05: Switch Management Register */

#define MV88E6XXX_G2_SWITCH_MGMT			0x05

#define MV88E6XXX_G2_SWITCH_MGMT_USE_DOUBLE_TAG_DATA	0x8000

#define MV88E6XXX_G2_SWITCH_MGMT_PREVENT_LOOPS		0x4000

#define MV88E6XXX_G2_SWITCH_MGMT_FLOW_CTL_MSG		0x2000

#define MV88E6XXX_G2_SWITCH_MGMT_FORCE_FLOW_CTL_PRI	0x0080

#define MV88E6XXX_G2_SWITCH_MGMT_RSVD2CPU		0x0008



/* Offset 0x06: Device Mapping Table Register */

#define MV88E6XXX_G2_DEVICE_MAPPING		0x06