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Commit 6bc711f6 authored by Viresh Kumar's avatar Viresh Kumar Committed by Vinod Koul
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dmaengine/dw_dmac: Add 64 bit access width support for slave xfers on mem side 



64 bit transfers are possible on both sides in slave transfers (memory as well
as peripherals). This patch adds support for it memory side 64 bit transfers.

Signed-off-by: default avatarViresh Kumar <viresh.kumar@st.com>
Signed-off-by: default avatarVinod Koul <vinod.koul@linux.intel.com>
parent ff7b05f2

drivers/dma/dw_dmac.c

+16 −4
Original line number Diff line number Diff line
@@ -749,8 +749,14 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, 


			mem = sg_phys(sg);

			len = sg_dma_len(sg);



			if (!((mem | len) & 7))

				mem_width = 3;

			else if (!((mem | len) & 3))

				mem_width = 2;

			if (unlikely(mem & 3 || len & 3))

			else if (!((mem | len) & 1))

				mem_width = 1;

			else

				mem_width = 0;



slave_sg_todev_fill_desc:
@@ -807,8 +813,14 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, 


			mem = sg_phys(sg);

			len = sg_dma_len(sg);



			if (!((mem | len) & 7))

				mem_width = 3;

			else if (!((mem | len) & 3))

				mem_width = 2;

			if (unlikely(mem & 3 || len & 3))

			else if (!((mem | len) & 1))

				mem_width = 1;

			else

				mem_width = 0;



slave_sg_fromdev_fill_desc: