Loading arch/arm64/boot/dts/qcom/sa8155-v2.dtsi +0 −27 Original line number Diff line number Diff line Loading @@ -57,17 +57,6 @@ opp-hz = /bits/ 64 <427000000>; opp-microvolt = <RPMH_REGULATOR_LEVEL_SVS_L1>; }; opp-345000000 { opp-hz = /bits/ 64 <345000000>; opp-microvolt = <RPMH_REGULATOR_LEVEL_SVS>; }; opp-257000000 { opp-hz = /bits/ 64 <257000000>; opp-microvolt = <RPMH_REGULATOR_LEVEL_LOW_SVS>; }; }; }; Loading Loading @@ -122,22 +111,6 @@ qcom,gpu-pwrlevel@5 { reg = <5>; qcom,gpu-freq = <345000000>; qcom,bus-freq = <3>; qcom,bus-min = <3>; qcom,bus-max = <8>; }; qcom,gpu-pwrlevel@6 { reg = <6>; qcom,gpu-freq = <257000000>; qcom,bus-freq = <2>; qcom,bus-min = <1>; qcom,bus-max = <8>; }; qcom,gpu-pwrlevel@7 { reg = <7>; qcom,gpu-freq = <0>; qcom,bus-freq = <0>; qcom,bus-min = <0>; Loading Loading
arch/arm64/boot/dts/qcom/sa8155-v2.dtsi +0 −27 Original line number Diff line number Diff line Loading @@ -57,17 +57,6 @@ opp-hz = /bits/ 64 <427000000>; opp-microvolt = <RPMH_REGULATOR_LEVEL_SVS_L1>; }; opp-345000000 { opp-hz = /bits/ 64 <345000000>; opp-microvolt = <RPMH_REGULATOR_LEVEL_SVS>; }; opp-257000000 { opp-hz = /bits/ 64 <257000000>; opp-microvolt = <RPMH_REGULATOR_LEVEL_LOW_SVS>; }; }; }; Loading Loading @@ -122,22 +111,6 @@ qcom,gpu-pwrlevel@5 { reg = <5>; qcom,gpu-freq = <345000000>; qcom,bus-freq = <3>; qcom,bus-min = <3>; qcom,bus-max = <8>; }; qcom,gpu-pwrlevel@6 { reg = <6>; qcom,gpu-freq = <257000000>; qcom,bus-freq = <2>; qcom,bus-min = <1>; qcom,bus-max = <8>; }; qcom,gpu-pwrlevel@7 { reg = <7>; qcom,gpu-freq = <0>; qcom,bus-freq = <0>; qcom,bus-min = <0>; Loading