Merge "msm/drm/sde: fix recursive clock enablement in sde_reg_dump" (67c1e15c) · Commits · e / devices / android_kernel_xiaomi_nabu

drivers/gpu/drm/msm/sde_dbg.c

+41 −20

Original line number	Diff line number	Diff line
		/* Copyright (c) 2009-2018, The Linux Foundation. All rights reserved.
		/* Copyright (c) 2009-2019, The Linux Foundation. All rights reserved.
		*
		* This program is free software; you can redistribute it and/or modify
		* it under the terms of the GNU General Public License version 2 and
		@@ -244,6 +244,7 @@ static struct sde_dbg_base {
		u32 cur_evt_index;
		u32 dbgbus_dump_idx;
		u32 vbif_dbgbus_dump_idx;
		enum sde_dbg_dump_context dump_mode;
		} sde_dbg_base;

		/* sde_dbg_base_evtlog - global pointer to main sde event log for macro use */
		@@ -3389,6 +3390,17 @@ static inline int _sde_dbg_enable_power(int enable)
		enable);
		}

		/**
		* _sde_power_check - check if power needs to enabled
		* @dump_mode: to check if power need to be enabled
		* Return: true if success; false otherwise
		*/
		static inline bool _sde_power_check(enum sde_dbg_dump_context dump_mode)
		{
		return (dump_mode == SDE_DBG_DUMP_CLK_ENABLED_CTX \|\|
		dump_mode == SDE_DBG_DUMP_IRQ_CTX) ? false : true;
		}

		/**
		* _sde_dump_reg - helper function for dumping rotator register set content
		* @dump_name: register set name
		@@ -3400,8 +3412,7 @@ static inline int _sde_dbg_enable_power(int enable)
		* @from_isr: whether being called from isr context
		*/
		static void _sde_dump_reg(const char *dump_name, u32 reg_dump_flag,
		char base_addr, char addr, size_t len_bytes, u32 **dump_mem,
		bool from_isr)
		char base_addr, char addr, size_t len_bytes, u32 **dump_mem)
		{
		u32 in_log, in_mem, len_align, len_padded;
		u32 *dump_addr = NULL;
		@@ -3449,7 +3460,7 @@ static void _sde_dump_reg(const char *dump_name, u32 reg_dump_flag,
		}
		}

		if (!from_isr) {
		if (_sde_power_check(sde_dbg_base.dump_mode)) {
		rc = _sde_dbg_enable_power(true);
		if (rc) {
		pr_err("failed to enable power %d\n", rc);
		@@ -3481,7 +3492,7 @@ static void _sde_dump_reg(const char *dump_name, u32 reg_dump_flag,
		addr += REG_DUMP_ALIGN;
		}

		if (!from_isr)
		if (_sde_power_check(sde_dbg_base.dump_mode))
		_sde_dbg_enable_power(false);
		}

		@@ -3583,7 +3594,7 @@ static void _sde_dump_reg_by_ranges(struct sde_dbg_reg_base *dbg,

		_sde_dump_reg(range_node->range_name, reg_dump_flag,
		dbg->base, addr, len,
		&range_node->reg_dump, false);
		&range_node->reg_dump);
		}
		} else {
		/* If there is no list to dump ranges, dump all registers */
		@@ -3594,7 +3605,7 @@ static void _sde_dump_reg_by_ranges(struct sde_dbg_reg_base *dbg,
		addr = dbg->base;
		len = dbg->max_offset;
		_sde_dump_reg(dbg->name, reg_dump_flag, dbg->base, addr, len,
		&dbg->reg_dump, false);
		&dbg->reg_dump);
		}
		}

		@@ -3721,11 +3732,13 @@ static void _sde_dbg_dump_sde_dbg_bus(struct sde_dbg_sde_debug_bus *bus)
		}
		}

		if (_sde_power_check(sde_dbg_base.dump_mode)) {
		rc = _sde_dbg_enable_power(true);
		if (rc) {
		pr_err("failed to enable power %d\n", rc);
		return;
		}
		}

		for (i = 0; i < bus->cmn.entries_size; i++) {
		head = bus->entries + i;
		@@ -3766,6 +3779,8 @@ static void _sde_dbg_dump_sde_dbg_bus(struct sde_dbg_sde_debug_bus *bus)
		head->wr_addr != DBGBUS_DSPP)
		writel_relaxed(0x0, mem_base + DBGBUS_DSPP);
		}

		if (_sde_power_check(sde_dbg_base.dump_mode))
		_sde_dbg_enable_power(false);

		dev_info(sde_dbg_base.dev, "======== end %s dump =========\n",
		@@ -3878,11 +3893,14 @@ static void _sde_dbg_dump_vbif_dbg_bus(struct sde_dbg_vbif_debug_bus *bus)
		}
		}


		if (_sde_power_check(sde_dbg_base.dump_mode)) {
		rc = _sde_dbg_enable_power(true);
		if (rc) {
		pr_err("failed to enable power %d\n", rc);
		return;
		}
		}

		value = readl_relaxed(mem_base + MMSS_VBIF_CLKON);
		writel_relaxed(value \| BIT(1), mem_base + MMSS_VBIF_CLKON);
		@@ -3933,6 +3951,7 @@ static void _sde_dbg_dump_vbif_dbg_bus(struct sde_dbg_vbif_debug_bus *bus)
		dump_addr += (head->block_cnt * head->test_pnt_cnt * 4);
		}

		if (_sde_power_check(sde_dbg_base.dump_mode))
		_sde_dbg_enable_power(false);

		dev_info(sde_dbg_base.dev, "======== end %s dump =========\n",
		@@ -4001,7 +4020,7 @@ static void _sde_dump_work(struct work_struct *work)
		sde_dbg_base.dump_secure);
		}

		void sde_dbg_dump(bool queue_work, const char *name, ...)
		void sde_dbg_dump(enum sde_dbg_dump_context dump_mode, const char *name, ...)
		{
		int i, index = 0;
		bool do_panic = false;
		@@ -4018,7 +4037,8 @@ void sde_dbg_dump(bool queue_work, const char *name, ...)
		if (!sde_evtlog_is_enabled(sde_dbg_base.evtlog, SDE_EVTLOG_ALWAYS))
		return;

		if (queue_work && work_pending(&sde_dbg_base.dump_work))
		if ((dump_mode == SDE_DBG_DUMP_IRQ_CTX) &&
		work_pending(&sde_dbg_base.dump_work))
		return;

		blk_arr = &sde_dbg_base.req_dump_blks[0];
		@@ -4027,6 +4047,7 @@ void sde_dbg_dump(bool queue_work, const char *name, ...)
		memset(sde_dbg_base.req_dump_blks, 0,
		sizeof(sde_dbg_base.req_dump_blks));
		sde_dbg_base.dump_all = false;
		sde_dbg_base.dump_mode = dump_mode;

		va_start(args, name);
		i = 0;
		@@ -4069,7 +4090,7 @@ void sde_dbg_dump(bool queue_work, const char *name, ...)
		}
		va_end(args);

		if (queue_work) {
		if (dump_mode == SDE_DBG_DUMP_IRQ_CTX) {
		/* schedule work to dump later */
		sde_dbg_base.work_panic = do_panic;
		sde_dbg_base.dbgbus_sde.cmn.include_in_deferred_work =

drivers/gpu/drm/msm/sde_dbg.h

+25 −7

Original line number	Diff line number	Diff line
		/* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
		/* Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
		*
		* This program is free software; you can redistribute it and/or modify
		* it under the terms of the GNU General Public License version 2 and
		@@ -49,6 +49,12 @@ enum sde_dbg_dump_flag {
		SDE_DBG_DUMP_IN_MEM = BIT(1),
		};

		enum sde_dbg_dump_context {
		SDE_DBG_DUMP_PROC_CTX,
		SDE_DBG_DUMP_IRQ_CTX,
		SDE_DBG_DUMP_CLK_ENABLED_CTX,
		};

		#ifdef CONFIG_DRM_SDE_EVTLOG_DEBUG
		#define SDE_EVTLOG_DEFAULT_ENABLE (SDE_EVTLOG_CRITICAL \| SDE_EVTLOG_IRQ)
		#else
		@@ -137,8 +143,8 @@ extern struct sde_dbg_evtlog *sde_dbg_base_evtlog;
		* Including the special name "panic" will trigger a panic after
		* the dumping work has completed.
		*/
		#define SDE_DBG_DUMP(...) sde_dbg_dump(false, __func__, ##__VA_ARGS__, \
		SDE_DBG_DUMP_DATA_LIMITER)
		#define SDE_DBG_DUMP(...) sde_dbg_dump(SDE_DBG_DUMP_PROC_CTX, __func__, \
		##__VA_ARGS__, SDE_DBG_DUMP_DATA_LIMITER)

		/**
		* SDE_DBG_DUMP_WQ - trigger dumping of all sde_dbg facilities, queuing the work
		@@ -148,8 +154,19 @@ extern struct sde_dbg_evtlog *sde_dbg_base_evtlog;
		* Including the special name "panic" will trigger a panic after
		* the dumping work has completed.
		*/
		#define SDE_DBG_DUMP_WQ(...) sde_dbg_dump(true, __func__, ##__VA_ARGS__, \
		SDE_DBG_DUMP_DATA_LIMITER)
		#define SDE_DBG_DUMP_WQ(...) sde_dbg_dump(SDE_DBG_DUMP_IRQ_CTX, __func__, \
		##__VA_ARGS__, SDE_DBG_DUMP_DATA_LIMITER)

		/**
		* SDE_DBG_DUMP_CLK_EN - trigger dumping of all sde_dbg facilities, without clk
		* @va_args: list of named register dump ranges and regions to dump, as
		* registered previously through sde_dbg_reg_register_base and
		* sde_dbg_reg_register_dump_range.
		* Including the special name "panic" will trigger a panic after
		* the dumping work has completed.
		*/
		#define SDE_DBG_DUMP_CLK_EN(...) sde_dbg_dump(SDE_DBG_DUMP_CLK_ENABLED_CTX, \
		__func__, ##__VA_ARGS__, SDE_DBG_DUMP_DATA_LIMITER)

		/**
		* SDE_DBG_EVT_CTRL - trigger a different driver events
		@@ -254,7 +271,7 @@ void sde_dbg_destroy(void);
		* the dumping work has completed.
		* Returns: none
		*/
		void sde_dbg_dump(bool queue_work, const char *name, ...);
		void sde_dbg_dump(enum sde_dbg_dump_context mode, const char *name, ...);

		/**
		* sde_dbg_ctrl - trigger specific actions for the driver with debugging
		@@ -401,7 +418,8 @@ static inline void sde_dbg_destroy(void)
		{
		}

		static inline void sde_dbg_dump(bool queue_work, const char *name, ...)
		static inline void sde_dbg_dump(enum sde_dbg_dump_context,
		const char *name, ...)
		{
		}