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Commit 671d41e6 authored by John Crispin's avatar John Crispin Committed by David S. Miller
Browse files

net-next: mediatek: add RX IRQ delay support 



The PDMA engine used for RX allows IRQ aggregation. The patch sets up the
corresponding registers to aggregate 4 IRQs into one. Using aggregation
reduces the load on the core handling to a quarter thus reducing IRQ
latency and increasing RX performance by around 10%.

Signed-off-by: default avatarJohn Crispin <john@phrozen.org>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 5969c427

drivers/net/ethernet/mediatek/mtk_eth_soc.c

+3 −1
Original line number Diff line number Diff line
@@ -1861,9 +1861,11 @@ static int mtk_hw_init(struct mtk_eth *eth) 
	/* Enable RX VLan Offloading */

	mtk_w32(eth, 1, MTK_CDMP_EG_CTRL);



	/* enable interrupt delay for RX */

	mtk_w32(eth, MTK_PDMA_DELAY_RX_DELAY, MTK_PDMA_DELAY_INT);



	/* disable delay and normal interrupt */

	mtk_w32(eth, 0, MTK_QDMA_DELAY_INT);

	mtk_w32(eth, 0, MTK_PDMA_DELAY_INT);

	mtk_irq_disable(eth, MTK_QDMA_INT_MASK, ~0);

	mtk_irq_disable(eth, MTK_PDMA_INT_MASK, ~0);

	mtk_w32(eth, RST_GL_PSE, MTK_RST_GL);

drivers/net/ethernet/mediatek/mtk_eth_soc.h

+10 −3
Original line number Diff line number Diff line
@@ -126,6 +126,13 @@ 


/* PDMA Delay Interrupt Register */

#define MTK_PDMA_DELAY_INT		0xa0c

#define MTK_PDMA_DELAY_RX_EN		BIT(15)

#define MTK_PDMA_DELAY_RX_PINT		4

#define MTK_PDMA_DELAY_RX_PINT_SHIFT	8

#define MTK_PDMA_DELAY_RX_PTIME		4

#define MTK_PDMA_DELAY_RX_DELAY		\

	(MTK_PDMA_DELAY_RX_EN | MTK_PDMA_DELAY_RX_PTIME | \

	(MTK_PDMA_DELAY_RX_PINT << MTK_PDMA_DELAY_RX_PINT_SHIFT))



/* PDMA Interrupt Status Register */

#define MTK_PDMA_INT_STATUS	0xa20
@@ -206,6 +213,7 @@ 


/* QDMA Interrupt Status Register */

#define MTK_QMTK_INT_STATUS	0x1A18

#define MTK_RX_DONE_DLY		BIT(30)

#define MTK_RX_DONE_INT3	BIT(19)

#define MTK_RX_DONE_INT2	BIT(18)

#define MTK_RX_DONE_INT1	BIT(17)
@@ -214,8 +222,7 @@ 
#define MTK_TX_DONE_INT2	BIT(2)

#define MTK_TX_DONE_INT1	BIT(1)

#define MTK_TX_DONE_INT0	BIT(0)

#define MTK_RX_DONE_INT		(MTK_RX_DONE_INT0 | MTK_RX_DONE_INT1 | \

				 MTK_RX_DONE_INT2 | MTK_RX_DONE_INT3)

#define MTK_RX_DONE_INT		MTK_RX_DONE_DLY

#define MTK_TX_DONE_INT		(MTK_TX_DONE_INT0 | MTK_TX_DONE_INT1 | \

				 MTK_TX_DONE_INT2 | MTK_TX_DONE_INT3)