Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 6623b419 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/net-next 



Jeff Kirsher says:

====================
Intel Wired LAN Driver Updates

This series contains updates to e1000, e1000e, ixgbe and i40evf.

Emil provides a fix for ixgbe so that non-fiber devices with MNG FW enabled
are able to link at 100Mbps.

Jacob provides several changes for ixgbe, most of which are PTP related.
Renames ixgbe_ptp_enable() to ixgbe_ptp_feature_enable() to better reflect
the functions purpose.  Extracts the hardware setup logic for the PTP
hardware bits from the ixgbe_ptp_set_ts_config() to enable future work for
the ixgbe_ptp_reset().  Maintain the hwstamp configuration through a reset
and extracts the creation of the PTP clock device from ptp_init() in order
to properly handle a suspend/resume cycle and only calls it if we don't
already have a ptp_clock pointer.

David provides a patch to expend the e1000e driver to turn on unicast
PROMISC when there is failure to write to a shared receive address register.
The fix update_phy_task() for 82579 is expanded to include newer PHYs as well
so that the dev_spec->eee_lp_ability has the correct value when going into
SX states.

Todd provides a e1000e fix an errata for 82574/82583 where it is possible
bad bits are read from SYSTIMH/L so check to see that the time is
incrementing at a reasonable rate and is a multiple of the time incremental
value.  Removes a redundant igb PHY power down register write.

Andi Kleen out of lines two write functions for e1000e to save 30k text size.

Tobias Klauser converts the e1000 and i40evf drivers to use the
is_broadcast_ether_addr() and is_multicast_ether_addr().
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 3bea8edd dc5f2de6

drivers/net/ethernet/intel/e1000/e1000_hw.c

+2 −2
Original line number Diff line number Diff line
@@ -4877,10 +4877,10 @@ void e1000_tbi_adjust_stats(struct e1000_hw *hw, struct e1000_hw_stats *stats, 
	 * since the test for a multicast frame will test positive on

	 * a broadcast frame.

	 */

	if ((mac_addr[0] == (u8) 0xff) && (mac_addr[1] == (u8) 0xff))

	if (is_broadcast_ether_addr(mac_addr))

		/* Broadcast packet */

		stats->bprc++;

	else if (*mac_addr & 0x01)

	else if (is_multicast_ether_addr(mac_addr))

		/* Multicast packet */

		stats->mprc++;

drivers/net/ethernet/intel/e1000e/80003es2lan.c

+1 −0
Original line number Diff line number Diff line
@@ -1365,6 +1365,7 @@ static const struct e1000_mac_operations es2_mac_ops = { 
	.setup_led		= e1000e_setup_led_generic,

	.config_collision_dist	= e1000e_config_collision_dist_generic,

	.rar_set		= e1000e_rar_set_generic,

	.rar_get_count		= e1000e_rar_get_count_generic,

};



static const struct e1000_phy_operations es2_phy_ops = {

drivers/net/ethernet/intel/e1000e/82571.c

+1 −0
Original line number Diff line number Diff line
@@ -1896,6 +1896,7 @@ static const struct e1000_mac_operations e82571_mac_ops = { 
	.config_collision_dist	= e1000e_config_collision_dist_generic,

	.read_mac_addr		= e1000_read_mac_addr_82571,

	.rar_set		= e1000e_rar_set_generic,

	.rar_get_count		= e1000e_rar_get_count_generic,

};



static const struct e1000_phy_operations e82_phy_ops_igp = {

drivers/net/ethernet/intel/e1000e/e1000.h

+4 −29
Original line number Diff line number Diff line
@@ -391,6 +391,8 @@ s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca); 
 * 25MHz	46-bit	2^46 / 10^9 / 3600 = 19.55 hours

 */

#define E1000_SYSTIM_OVERFLOW_PERIOD	(HZ * 60 * 60 * 4)

#define E1000_MAX_82574_SYSTIM_REREADS	50

#define E1000_82574_SYSTIM_EPSILON	(1ULL << 35ULL)



/* hardware capability, feature, and workaround flags */

#define FLAG_HAS_AMT                      (1 << 0)
@@ -573,35 +575,8 @@ static inline u32 __er32(struct e1000_hw *hw, unsigned long reg) 


#define er32(reg)	__er32(hw, E1000_##reg)



/**

 * __ew32_prepare - prepare to write to MAC CSR register on certain parts

 * @hw: pointer to the HW structure

 *

 * When updating the MAC CSR registers, the Manageability Engine (ME) could

 * be accessing the registers at the same time.  Normally, this is handled in

 * h/w by an arbiter but on some parts there is a bug that acknowledges Host

 * accesses later than it should which could result in the register to have

 * an incorrect value.  Workaround this by checking the FWSM register which

 * has bit 24 set while ME is accessing MAC CSR registers, wait if it is set

 * and try again a number of times.

 **/

static inline s32 __ew32_prepare(struct e1000_hw *hw)

{

	s32 i = E1000_ICH_FWSM_PCIM2PCI_COUNT;



	while ((er32(FWSM) & E1000_ICH_FWSM_PCIM2PCI) && --i)

		udelay(50);



	return i;

}



static inline void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val)

{

	if (hw->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)

		__ew32_prepare(hw);



	writel(val, hw->hw_addr + reg);

}

s32 __ew32_prepare(struct e1000_hw *hw);

void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val);



#define ew32(reg, val)	__ew32(hw, E1000_##reg, (val))

drivers/net/ethernet/intel/e1000e/hw.h

+2 −1
Original line number Diff line number Diff line
@@ -469,8 +469,9 @@ struct e1000_mac_operations { 
	s32  (*setup_led)(struct e1000_hw *);

	void (*write_vfta)(struct e1000_hw *, u32, u32);

	void (*config_collision_dist)(struct e1000_hw *);

	void (*rar_set)(struct e1000_hw *, u8 *, u32);

	int  (*rar_set)(struct e1000_hw *, u8 *, u32);

	s32  (*read_mac_addr)(struct e1000_hw *);

	u32  (*rar_get_count)(struct e1000_hw *);

};



/* When to use various PHY register access functions: