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Commit 64082568 authored by Sergei Shtylyov's avatar Sergei Shtylyov Committed by Geert Uytterhoeven
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clk: renesas: r8a77970: Add LVDS clock 



I seem to have omitted the LVDS clock from the R8A77970 CPG/MSSR support
patch for some reason -- add it back...

Based on the original (and large) patch by Daisuke Matsushita
<daisuke.matsushita.ns@hitachi.com>.

Fixes: 8d46e28f ("clk: renesas: cpg-mssr: Add R8A77970 support")
Signed-off-by: default avatarVladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: default avatarSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 4fbd8d19

drivers/clk/renesas/r8a77970-cpg-mssr.c

+1 −0
Original line number Diff line number Diff line
@@ -105,6 +105,7 @@ static const struct mssr_mod_clk r8a77970_mod_clks[] __initconst = { 
	DEF_MOD("vspd0",		 623,	R8A77970_CLK_S2D1),

	DEF_MOD("csi40",		 716,	R8A77970_CLK_CSI0),

	DEF_MOD("du0",			 724,	R8A77970_CLK_S2D1),

	DEF_MOD("lvds",			 727,	R8A77970_CLK_S2D1),

	DEF_MOD("vin3",			 808,	R8A77970_CLK_S2D1),

	DEF_MOD("vin2",			 809,	R8A77970_CLK_S2D1),

	DEF_MOD("vin1",			 810,	R8A77970_CLK_S2D1),