Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 6395f84f authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
Browse files

Merge "ARM: dts: msm: Add GPU speedbin support for atoll"

parents 9508c7b9 84e88bd1

arch/arm64/boot/dts/qcom/atoll.dtsi

+355 −65
Original line number Diff line number Diff line
@@ -3431,22 +3431,37 @@ 
		<26 512 0 7216000>,    /* 11 bus=1804 */

		<26 512 0 8532000>;    /* 12 bus=2133 */



	qcom,initial-pwrlevel = <6>;

	qcom,ca-target-pwrlevel = <5>;

	qcom,gpu-speed-bin = <0x6004 0x1fe00000 21>;



	/delete-node/ qcom,gpu-pwrlevel-bins;



	qcom,gpu-pwrlevels {

	/*

	 * Speed-bin zero is default speed bin.

	 * For rest of the speed bins, speed-bin value

	 * is calulated as FMAX/4.8MHz + 2 round up to zero

	 * decimal places.

	 */



	qcom,gpu-pwrlevel-bins {

		#address-cells = <1>;

		#size-cells = <0>;



		compatible = "qcom,gpu-pwrlevel-bins";



		qcom,gpu-pwrlevels-0 {

			#address-cells = <1>;

			#size-cells = <0>;



		compatible = "qcom,gpu-pwrlevels";

			qcom,speed-bin = <0>;



			qcom,initial-pwrlevel = <6>;

			qcom,ca-target-pwrlevel = <5>;



			/* TURBO_L1 */

			qcom,gpu-pwrlevel@0 {

				reg = <0>;

				qcom,gpu-freq = <825000000>;

			qcom,bus-freq = <11>;

				qcom,bus-freq = <12>;

				qcom,bus-min = <10>;

				qcom,bus-max = <12>;

			};
@@ -3455,9 +3470,9 @@ 
			qcom,gpu-pwrlevel@1 {

				reg = <1>;

				qcom,gpu-freq = <800000000>;

			qcom,bus-freq = <11>;

				qcom,bus-freq = <12>;

				qcom,bus-min = <10>;

			qcom,bus-max = <11>;

				qcom,bus-max = <12>;

			};



			/* NOM_L1 */
@@ -3466,7 +3481,7 @@ 
				qcom,gpu-freq = <650000000>;

				qcom,bus-freq = <10>;

				qcom,bus-min = <8>;

			qcom,bus-max = <11>;

				qcom,bus-max = <12>;

			};



			/* NOM */
@@ -3475,9 +3490,91 @@ 
				qcom,gpu-freq = <565000000>;

				qcom,bus-freq = <9>;

				qcom,bus-min = <8>;

				qcom,bus-max = <11>;

			};



			/* SVS_L1 */

			qcom,gpu-pwrlevel@4 {

				reg = <4>;

				qcom,gpu-freq = <430000000>;

				qcom,bus-freq = <8>;

				qcom,bus-min = <7>;

				qcom,bus-max = <10>;

			};



			/* SVS */

			qcom,gpu-pwrlevel@5 {

				reg = <5>;

				qcom,gpu-freq = <355000000>;

				qcom,bus-freq = <7>;

				qcom,bus-min = <5>;

				qcom,bus-max = <8>;

			};



			/* LOW SVS */

			qcom,gpu-pwrlevel@6 {

				reg = <6>;

				qcom,gpu-freq = <267000000>;

				qcom,bus-freq = <5>;

				qcom,bus-min = <4>;

				qcom,bus-max = <7>;

			};



			/* XO */

			qcom,gpu-pwrlevel@7 {

				reg = <7>;

				qcom,gpu-freq = <0>;

				qcom,bus-freq = <0>;

				qcom,bus-min = <0>;

				qcom,bus-max = <0>;

			};

		};



		qcom,gpu-pwrlevels-1 {

			#address-cells = <1>;

			#size-cells = <0>;



			qcom,speed-bin = <172>;



			qcom,initial-pwrlevel = <6>;

			qcom,ca-target-pwrlevel = <5>;



			/* TURBO_L1 */

			qcom,gpu-pwrlevel@0 {

				reg = <0>;

				qcom,gpu-freq = <825000000>;

				qcom,bus-freq = <12>;

				qcom,bus-min = <10>;

				qcom,bus-max = <12>;

			};



			/* TURBO */

			qcom,gpu-pwrlevel@1 {

				reg = <1>;

				qcom,gpu-freq = <800000000>;

				qcom,bus-freq = <12>;

				qcom,bus-min = <10>;

				qcom,bus-max = <12>;

			};



			/* NOM_L1 */

			qcom,gpu-pwrlevel@2 {

				reg = <2>;

				qcom,gpu-freq = <650000000>;

				qcom,bus-freq = <10>;

				qcom,bus-min = <8>;

				qcom,bus-max = <12>;

			};



			/* NOM */

			qcom,gpu-pwrlevel@3 {

				reg = <3>;

				qcom,gpu-freq = <565000000>;

				qcom,bus-freq = <9>;

				qcom,bus-min = <8>;

				qcom,bus-max = <11>;

			};



			/* SVS_L1 */

			qcom,gpu-pwrlevel@4 {

				reg = <4>;
@@ -3514,6 +3611,199 @@ 
				qcom,bus-max = <0>;

			};

		};



		qcom,gpu-pwrlevels-2 {

			#address-cells = <1>;

			#size-cells = <0>;



			qcom,speed-bin = <169>;



			qcom,initial-pwrlevel = <5>;

			qcom,ca-target-pwrlevel = <4>;



			/* TURBO */

			qcom,gpu-pwrlevel@0 {

				reg = <0>;

				qcom,gpu-freq = <800000000>;

				qcom,bus-freq = <12>;

				qcom,bus-min = <10>;

				qcom,bus-max = <12>;

			};



			/* NOM_L1 */

			qcom,gpu-pwrlevel@1 {

				reg = <1>;

				qcom,gpu-freq = <650000000>;

				qcom,bus-freq = <10>;

				qcom,bus-min = <8>;

				qcom,bus-max = <12>;

			};



			/* NOM */

			qcom,gpu-pwrlevel@2 {

				reg = <2>;

				qcom,gpu-freq = <565000000>;

				qcom,bus-freq = <9>;

				qcom,bus-min = <8>;

				qcom,bus-max = <11>;

			};



			/* SVS_L1 */

			qcom,gpu-pwrlevel@3 {

				reg = <3>;

				qcom,gpu-freq = <430000000>;

				qcom,bus-freq = <8>;

				qcom,bus-min = <7>;

				qcom,bus-max = <10>;

			};



			/* SVS */

			qcom,gpu-pwrlevel@4 {

				reg = <4>;

				qcom,gpu-freq = <355000000>;

				qcom,bus-freq = <7>;

				qcom,bus-min = <5>;

				qcom,bus-max = <8>;

			};



			/* LOW SVS */

			qcom,gpu-pwrlevel@5 {

				reg = <5>;

				qcom,gpu-freq = <267000000>;

				qcom,bus-freq = <5>;

				qcom,bus-min = <4>;

				qcom,bus-max = <7>;

			};



			/* XO */

			qcom,gpu-pwrlevel@6 {

				reg = <6>;

				qcom,gpu-freq = <0>;

				qcom,bus-freq = <0>;

				qcom,bus-min = <0>;

				qcom,bus-max = <0>;

			};

		};



		qcom,gpu-pwrlevels-3 {

			#address-cells = <1>;

			#size-cells = <0>;



			qcom,speed-bin = <130>;



			qcom,initial-pwrlevel = <4>;

			qcom,ca-target-pwrlevel = <3>;



			/* NOM_L1 */

			qcom,gpu-pwrlevel@0 {

				reg = <0>;

				qcom,gpu-freq = <610000000>;

				qcom,bus-freq = <11>;

				qcom,bus-min = <8>;

				qcom,bus-max = <11>;

			};



			/* NOM */

			qcom,gpu-pwrlevel@1 {

				reg = <1>;

				qcom,gpu-freq = <565000000>;

				qcom,bus-freq = <9>;

				qcom,bus-min = <8>;

				qcom,bus-max = <11>;

			};



			/* SVS_L1 */

			qcom,gpu-pwrlevel@2 {

				reg = <2>;

				qcom,gpu-freq = <430000000>;

				qcom,bus-freq = <8>;

				qcom,bus-min = <7>;

				qcom,bus-max = <10>;

			};



			/* SVS */

			qcom,gpu-pwrlevel@3 {

				reg = <3>;

				qcom,gpu-freq = <355000000>;

				qcom,bus-freq = <7>;

				qcom,bus-min = <5>;

				qcom,bus-max = <8>;

			};



			/* LOW SVS */

			qcom,gpu-pwrlevel@4 {

				reg = <4>;

				qcom,gpu-freq = <267000000>;

				qcom,bus-freq = <5>;

				qcom,bus-min = <4>;

				qcom,bus-max = <7>;

			};



			/* XO */

			qcom,gpu-pwrlevel@5 {

				reg = <5>;

				qcom,gpu-freq = <0>;

				qcom,bus-freq = <0>;

				qcom,bus-min = <0>;

				qcom,bus-max = <0>;

			};

		};



		qcom,gpu-pwrlevels-4 {

			#address-cells = <1>;

			#size-cells = <0>;



			qcom,speed-bin = <107>;



			qcom,initial-pwrlevel = <3>;

			qcom,ca-target-pwrlevel = <2>;



			/* NOM */

			qcom,gpu-pwrlevel@0 {

				reg = <0>;

				qcom,gpu-freq = <504000000>;

				qcom,bus-freq = <11>;

				qcom,bus-min = <8>;

				qcom,bus-max = <11>;

			};



			/* SVS_L1 */

			qcom,gpu-pwrlevel@1 {

				reg = <1>;

				qcom,gpu-freq = <430000000>;

				qcom,bus-freq = <11>;

				qcom,bus-min = <7>;

				qcom,bus-max = <11>;

			};



			/* SVS */

			qcom,gpu-pwrlevel@2 {

				reg = <2>;

				qcom,gpu-freq = <355000000>;

				qcom,bus-freq = <8>;

				qcom,bus-min = <5>;

				qcom,bus-max = <9>;

			};



			/* LOW SVS */

			qcom,gpu-pwrlevel@3 {

				reg = <3>;

				qcom,gpu-freq = <267000000>;

				qcom,bus-freq = <5>;

				qcom,bus-min = <4>;

				qcom,bus-max = <8>;

			};



			/* XO */

			qcom,gpu-pwrlevel@4 {

				reg = <4>;

				qcom,gpu-freq = <0>;

				qcom,bus-freq = <0>;

				qcom,bus-min = <0>;

				qcom,bus-max = <0>;

			};

		};

	};

};



&ufs_phy_gdsc {