[SPARC]: Emulate cmpxchg like parisc (6197fe4d) · Commits · e / devices / android_kernel_xiaomi_nabu

arch/sparc/lib/atomic32.c

+15 −0

Original line number	Diff line number	Diff line
		@@ -2,6 +2,7 @@
		* atomic32.c: 32-bit atomic_t implementation
		*
		* Copyright (C) 2004 Keith M Wesolowski
		* Copyright (C) 2007 Kyle McMartin
		*
		* Based on asm-parisc/atomic.h Copyright (C) 2000 Philipp Rumpf
		*/
		@@ -117,3 +118,17 @@ unsigned long ___change_bit(unsigned long *addr, unsigned long mask)
		return old & mask;
		}
		EXPORT_SYMBOL(___change_bit);

		unsigned long __cmpxchg_u32(volatile u32 *ptr, u32 old, u32 new)
		{
		unsigned long flags;
		u32 prev;

		spin_lock_irqsave(ATOMIC_HASH(addr), flags);
		if ((prev = *ptr) == old)
		*ptr = new;
		spin_unlock_irqrestore(ATOMIC_HASH(addr), flags);

		return (unsigned long)prev;
		}
		EXPORT_SYMBOL(__cmpxchg_u32);

include/asm-sparc/atomic.h

+38 −0

Original line number	Diff line number	Diff line
		@@ -2,6 +2,7 @@
		*
		* Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
		* Copyright (C) 2000 Anton Blanchard (anton@linuxcare.com.au)
		* Copyright (C) 2007 Kyle McMartin (kyle@parisc-linux.org)
		*
		* Additions by Keith M Wesolowski (wesolows@foobazco.org) based
		* on asm-parisc/atomic.h Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>.
		@@ -10,11 +11,48 @@
		#ifndef __ARCH_SPARC_ATOMIC__
		#define __ARCH_SPARC_ATOMIC__

		#include <linux/types.h>

		typedef struct { volatile int counter; } atomic_t;

		#ifdef __KERNEL__

		/* Emulate cmpxchg() the same way we emulate atomics,
		* by hashing the object address and indexing into an array
		* of spinlocks to get a bit of performance...
		*
		* See arch/sparc/lib/atomic32.c for implementation.
		*
		* Cribbed from <asm-parisc/atomic.h>
		*/
		#define __HAVE_ARCH_CMPXCHG 1

		/* bug catcher for when unsupported size is used - won't link */
		extern void __cmpxchg_called_with_bad_pointer(void);
		/* we only need to support cmpxchg of a u32 on sparc */
		extern unsigned long __cmpxchg_u32(volatile u32 *m, u32 old, u32 new_);

		/* don't worry...optimizer will get rid of most of this */
		static __inline__ unsigned long
		__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new_, int size)
		{
		switch(size) {
		case 4:
		return __cmpxchg_u32((u32 *)ptr, (u32)old, (u32)new_);
		default:
		__cmpxchg_called_with_bad_pointer();
		break;
		}
		return old;
		}

		#define cmpxchg(ptr,o,n) ({ \
		__typeof__(*(ptr)) _o_ = (o); \
		__typeof__(*(ptr)) _n_ = (n); \
		(__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
		(unsigned long)_n_, sizeof(*(ptr))); \
		})

		#define ATOMIC_INIT(i) { (i) }

		extern int __atomic_add_return(int, atomic_t *);