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Commit 6043d6a7 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
Browse files

Merge "asoc: sdm660: Add 16ch playback and record support for TDM"

parents 7bf3b0bb 8be6bc7a

asoc/sdm660-common.c

+2233 −218

File changed.

Preview size limit exceeded, changes collapsed.

asoc/sdm660-common.h

+15 −3
Original line number Diff line number Diff line 
/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.

/* Copyright (c) 2015-2019, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -34,8 +34,8 @@ 
#define SAMPLING_RATE_352P8KHZ  352800

#define SAMPLING_RATE_384KHZ    384000



#define TDM_CHANNEL_MAX 8

#define TDM_SLOT_OFFSET_MAX 8

#define TDM_CHANNEL_MAX 16

#define TDM_SLOT_OFFSET_MAX 32



enum {

	TDM_0 = 0,
@@ -63,6 +63,12 @@ struct tdm_port { 
	u32 channel;

};



struct dev_config {

	u32 sample_rate;

	u32 bit_format;

	u32 channels;

};



enum {

	PRIM_MI2S = 0,

	SEC_MI2S,
@@ -130,4 +136,10 @@ int msm_mi2s_snd_startup(struct snd_pcm_substream *substream); 
void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream);

int msm_common_snd_controls_size(void);

void msm_set_codec_reg_done(bool done);

int msm_tdm_snd_startup(struct snd_pcm_substream *substream);

void msm_tdm_snd_shutdown(struct snd_pcm_substream *substream);

int msm_tdm_snd_hw_params(struct snd_pcm_substream *substream,

				     struct snd_pcm_hw_params *params);

int msm_tdm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,

				      struct snd_pcm_hw_params *params);

#endif

asoc/sdm660-ext-dai-links.c

+17 −180
Original line number Diff line number Diff line 
/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.

/* Copyright (c) 2015-2019, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -63,6 +63,12 @@ static struct snd_soc_ops msm_aux_pcm_be_ops = { 
	.shutdown = msm_aux_pcm_snd_shutdown,

};



static struct snd_soc_ops msm_tdm_be_ops = {

	.startup = msm_tdm_snd_startup,

	.shutdown = msm_tdm_snd_shutdown,

	.hw_params = msm_tdm_snd_hw_params,

};



static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)

{

	unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
@@ -112,175 +118,6 @@ static struct snd_soc_ops msm_wcn_ops = { 
	.hw_params = msm_wcn_hw_params,

};



/*TDM default offset currently only supporting TDM_RX_0 and TDM_TX_0 */

static unsigned int tdm_slot_offset[TDM_PORT_MAX][TDM_SLOT_OFFSET_MAX] = {

	{0, 4, 8, 12, 16, 20, 24, 28},/* TX_0 | RX_0 */

	{AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_1 | RX_1 */

	{AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_2 | RX_2 */

	{AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_3 | RX_3 */

	{AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_4 | RX_4 */

	{AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_5 | RX_5 */

	{AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_6 | RX_6 */

	{AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_7 | RX_7 */

};



static unsigned int tdm_param_set_slot_mask(u16 port_id, int slot_width,

					    int slots)

{

	unsigned int slot_mask = 0;

	int i, j;

	unsigned int *slot_offset;



	for (i = TDM_0; i < TDM_PORT_MAX; i++) {

		slot_offset = tdm_slot_offset[i];



		for (j = 0; j < TDM_SLOT_OFFSET_MAX; j++) {

			if (slot_offset[j] != AFE_SLOT_MAPPING_OFFSET_INVALID)

				slot_mask |=

				(1 << ((slot_offset[j] * 8) / slot_width));

			else

				break;

		}

	}



	return slot_mask;

}



static int msm_tdm_snd_hw_params(struct snd_pcm_substream *substream,

				     struct snd_pcm_hw_params *params)

{

	struct snd_soc_pcm_runtime *rtd = substream->private_data;

	struct snd_soc_dai *cpu_dai = rtd->cpu_dai;

	int ret = 0;

	int channels, slot_width, slots;

	unsigned int slot_mask;

	unsigned int *slot_offset;

	int offset_channels = 0;

	int i;



	pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);



	channels = params_channels(params);

	switch (channels) {

	case 1:

	case 2:

	case 3:

	case 4:

	case 5:

	case 6:

	case 7:

	case 8:

		switch (params_format(params)) {

		case SNDRV_PCM_FORMAT_S32_LE:

		case SNDRV_PCM_FORMAT_S24_LE:

		case SNDRV_PCM_FORMAT_S16_LE:

		/*

		 * up to 8 channels HW config should

		 * use 32 bit slot width for max support of

		 * stream bit width. (slot_width > bit_width)

		 */

			slot_width = 32;

			break;

		default:

			pr_err("%s: invalid param format 0x%x\n",

				__func__, params_format(params));

			return -EINVAL;

		}

		slots = 8;

		slot_mask = tdm_param_set_slot_mask(cpu_dai->id,

						    slot_width,

						    slots);

		if (!slot_mask) {

			pr_err("%s: invalid slot_mask 0x%x\n",

				__func__, slot_mask);

			return -EINVAL;

		}

		break;

	default:

		pr_err("%s: invalid param channels %d\n",

			__func__, channels);

		return -EINVAL;

	}

	/* currently only supporting TDM_RX_0 and TDM_TX_0 */

	switch (cpu_dai->id) {

	case AFE_PORT_ID_PRIMARY_TDM_RX:

	case AFE_PORT_ID_SECONDARY_TDM_RX:

	case AFE_PORT_ID_TERTIARY_TDM_RX:

	case AFE_PORT_ID_QUATERNARY_TDM_RX:

	case AFE_PORT_ID_QUINARY_TDM_RX:

	case AFE_PORT_ID_PRIMARY_TDM_TX:

	case AFE_PORT_ID_SECONDARY_TDM_TX:

	case AFE_PORT_ID_TERTIARY_TDM_TX:

	case AFE_PORT_ID_QUATERNARY_TDM_TX:

	case AFE_PORT_ID_QUINARY_TDM_TX:

		slot_offset = tdm_slot_offset[TDM_0];

		break;

	default:

		pr_err("%s: dai id 0x%x not supported\n",

			__func__, cpu_dai->id);

		return -EINVAL;

	}



	for (i = 0; i < TDM_SLOT_OFFSET_MAX; i++) {

		if (slot_offset[i] != AFE_SLOT_MAPPING_OFFSET_INVALID)

			offset_channels++;

		else

			break;

	}



	if (offset_channels == 0) {

		pr_err("%s: slot offset not supported, offset_channels %d\n",

			__func__, offset_channels);

		return -EINVAL;

	}



	if (channels > offset_channels) {

		pr_err("%s: channels %d exceed offset_channels %d\n",

			__func__, channels, offset_channels);

		return -EINVAL;

	}



	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {

		ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,

					       slots, slot_width);

		if (ret < 0) {

			pr_err("%s: failed to set tdm slot, err:%d\n",

				__func__, ret);

			goto end;

		}



		ret = snd_soc_dai_set_channel_map(cpu_dai, 0, NULL,

						  channels, slot_offset);

		if (ret < 0) {

			pr_err("%s: failed to set channel map, err:%d\n",

				__func__, ret);

			goto end;

		}

	} else {

		ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,

					       slots, slot_width);

		if (ret < 0) {

			pr_err("%s: failed to set tdm slot, err:%d\n",

				__func__, ret);

			goto end;

		}



		ret = snd_soc_dai_set_channel_map(cpu_dai, channels,

						  slot_offset, 0, NULL);

		if (ret < 0) {

			pr_err("%s: failed to set channel map, err:%d\n",

				__func__, ret);

			goto end;

		}

	}

end:

	return ret;

}



static struct snd_soc_ops msm_tdm_be_ops = {

	.hw_params = msm_tdm_snd_hw_params

};



static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)

{

	cpumask_t mask;
@@ -1489,7 +1326,7 @@ static struct snd_soc_dai_link msm_ext_common_be_dai[] = { 
		.no_pcm = 1,

		.dpcm_playback = 1,

		.id = MSM_BACKEND_DAI_PRI_TDM_RX_0,

		.be_hw_params_fixup = msm_common_be_hw_params_fixup,

		.be_hw_params_fixup = msm_tdm_be_hw_params_fixup,

		.ops = &msm_tdm_be_ops,

		.ignore_suspend = 1,

		.ignore_pmdown_time = 1,
@@ -1504,7 +1341,7 @@ static struct snd_soc_dai_link msm_ext_common_be_dai[] = { 
		.no_pcm = 1,

		.dpcm_capture = 1,

		.id = MSM_BACKEND_DAI_PRI_TDM_TX_0,

		.be_hw_params_fixup = msm_common_be_hw_params_fixup,

		.be_hw_params_fixup = msm_tdm_be_hw_params_fixup,

		.ops = &msm_tdm_be_ops,

		.ignore_suspend = 1,

	},
@@ -1518,7 +1355,7 @@ static struct snd_soc_dai_link msm_ext_common_be_dai[] = { 
		.no_pcm = 1,

		.dpcm_playback = 1,

		.id = MSM_BACKEND_DAI_SEC_TDM_RX_0,

		.be_hw_params_fixup = msm_common_be_hw_params_fixup,

		.be_hw_params_fixup = msm_tdm_be_hw_params_fixup,

		.ops = &msm_tdm_be_ops,

		.ignore_suspend = 1,

		.ignore_pmdown_time = 1,
@@ -1533,7 +1370,7 @@ static struct snd_soc_dai_link msm_ext_common_be_dai[] = { 
		.no_pcm = 1,

		.dpcm_capture = 1,

		.id = MSM_BACKEND_DAI_SEC_TDM_TX_0,

		.be_hw_params_fixup = msm_common_be_hw_params_fixup,

		.be_hw_params_fixup = msm_tdm_be_hw_params_fixup,

		.ops = &msm_tdm_be_ops,

		.ignore_suspend = 1,

	},
@@ -1547,7 +1384,7 @@ static struct snd_soc_dai_link msm_ext_common_be_dai[] = { 
		.no_pcm = 1,

		.dpcm_playback = 1,

		.id = MSM_BACKEND_DAI_TERT_TDM_RX_0,

		.be_hw_params_fixup = msm_common_be_hw_params_fixup,

		.be_hw_params_fixup = msm_tdm_be_hw_params_fixup,

		.ops = &msm_tdm_be_ops,

		.ignore_suspend = 1,

		.ignore_pmdown_time = 1,
@@ -1562,7 +1399,7 @@ static struct snd_soc_dai_link msm_ext_common_be_dai[] = { 
		.no_pcm = 1,

		.dpcm_capture = 1,

		.id = MSM_BACKEND_DAI_TERT_TDM_TX_0,

		.be_hw_params_fixup = msm_common_be_hw_params_fixup,

		.be_hw_params_fixup = msm_tdm_be_hw_params_fixup,

		.ops = &msm_tdm_be_ops,

		.ignore_suspend = 1,

	},
@@ -1576,7 +1413,7 @@ static struct snd_soc_dai_link msm_ext_common_be_dai[] = { 
		.no_pcm = 1,

		.dpcm_playback = 1,

		.id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,

		.be_hw_params_fixup = msm_common_be_hw_params_fixup,

		.be_hw_params_fixup = msm_tdm_be_hw_params_fixup,

		.ops = &msm_tdm_be_ops,

		.ignore_suspend = 1,

		.ignore_pmdown_time = 1,
@@ -1591,7 +1428,7 @@ static struct snd_soc_dai_link msm_ext_common_be_dai[] = { 
		.no_pcm = 1,

		.dpcm_capture = 1,

		.id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,

		.be_hw_params_fixup = msm_common_be_hw_params_fixup,

		.be_hw_params_fixup = msm_tdm_be_hw_params_fixup,

		.ops = &msm_tdm_be_ops,

		.ignore_suspend = 1,

	},
@@ -1605,7 +1442,7 @@ static struct snd_soc_dai_link msm_ext_common_be_dai[] = { 
		.no_pcm = 1,

		.dpcm_playback = 1,

		.id = MSM_BACKEND_DAI_QUIN_TDM_RX_0,

		.be_hw_params_fixup = msm_common_be_hw_params_fixup,

		.be_hw_params_fixup = msm_tdm_be_hw_params_fixup,

		.ops = &msm_tdm_be_ops,

		.ignore_suspend = 1,

		.ignore_pmdown_time = 1,
@@ -1620,7 +1457,7 @@ static struct snd_soc_dai_link msm_ext_common_be_dai[] = { 
		.no_pcm = 1,

		.dpcm_capture = 1,

		.id = MSM_BACKEND_DAI_QUIN_TDM_TX_0,

		.be_hw_params_fixup = msm_common_be_hw_params_fixup,

		.be_hw_params_fixup = msm_tdm_be_hw_params_fixup,

		.ops = &msm_tdm_be_ops,

		.ignore_suspend = 1,

	},

asoc/sdm660-internal.c

+4 −173
Original line number Diff line number Diff line 
/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.

/* Copyright (c) 2015-2019, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -50,18 +50,6 @@ enum { 
	SLIM_MAX,

};



/*TDM default offset currently only supporting TDM_RX_0 and TDM_TX_0 */

static unsigned int tdm_slot_offset[TDM_PORT_MAX][TDM_SLOT_OFFSET_MAX] = {

	{0, 4, 8, 12, 16, 20, 24, 28},/* TX_0 | RX_0 */

	{AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_1 | RX_1 */

	{AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_2 | RX_2 */

	{AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_3 | RX_3 */

	{AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_4 | RX_4 */

	{AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_5 | RX_5 */

	{AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_6 | RX_6 */

	{AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_7 | RX_7 */

};



static struct afe_clk_set int_mi2s_clk[INT_MI2S_MAX] = {

	{

		AFE_API_VERSION_I2S_CONFIG,
@@ -121,12 +109,6 @@ static struct afe_clk_set int_mi2s_clk[INT_MI2S_MAX] = { 
	},

};



struct dev_config {

	u32 sample_rate;

	u32 bit_format;

	u32 channels;

};



/* Default configuration of MI2S channels */

static struct dev_config int_mi2s_cfg[] = {

	[INT0_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
@@ -1426,159 +1408,6 @@ static int msm_wcn_hw_params(struct snd_pcm_substream *substream, 
	return ret;

}



static unsigned int tdm_param_set_slot_mask(u16 port_id, int slot_width,

					    int slots)

{

	unsigned int slot_mask = 0;

	int i, j;

	unsigned int *slot_offset;



	for (i = TDM_0; i < TDM_PORT_MAX; i++) {

		slot_offset = tdm_slot_offset[i];



		for (j = 0; j < TDM_SLOT_OFFSET_MAX; j++) {

			if (slot_offset[j] != AFE_SLOT_MAPPING_OFFSET_INVALID)

				slot_mask |=

				(1 << ((slot_offset[j] * 8) / slot_width));

			else

				break;

		}

	}



	return slot_mask;

}



static int msm_tdm_snd_hw_params(struct snd_pcm_substream *substream,

				     struct snd_pcm_hw_params *params)

{

	struct snd_soc_pcm_runtime *rtd = substream->private_data;

	struct snd_soc_dai *cpu_dai = rtd->cpu_dai;

	int ret = 0;

	int channels, slot_width, slots;

	unsigned int slot_mask;

	unsigned int *slot_offset;

	int offset_channels = 0;

	int i;



	pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);



	channels = params_channels(params);

	switch (channels) {

	case 1:

	case 2:

	case 3:

	case 4:

	case 5:

	case 6:

	case 7:

	case 8:

		switch (params_format(params)) {

		case SNDRV_PCM_FORMAT_S32_LE:

		case SNDRV_PCM_FORMAT_S24_LE:

		case SNDRV_PCM_FORMAT_S16_LE:

		/*

		 * up to 8 channels HW config should

		 * use 32 bit slot width for max support of

		 * stream bit width. (slot_width > bit_width)

		 */

			slot_width = 32;

			break;

		default:

			pr_err("%s: invalid param format 0x%x\n",

				__func__, params_format(params));

			return -EINVAL;

		}

		slots = 8;

		slot_mask = tdm_param_set_slot_mask(cpu_dai->id,

						    slot_width,

						    slots);

		if (!slot_mask) {

			pr_err("%s: invalid slot_mask 0x%x\n",

				__func__, slot_mask);

			return -EINVAL;

		}

		break;

	default:

		pr_err("%s: invalid param channels %d\n",

			__func__, channels);

		return -EINVAL;

	}

	/* currently only supporting TDM_RX_0 and TDM_TX_0 */

	switch (cpu_dai->id) {

	case AFE_PORT_ID_PRIMARY_TDM_RX:

	case AFE_PORT_ID_SECONDARY_TDM_RX:

	case AFE_PORT_ID_TERTIARY_TDM_RX:

	case AFE_PORT_ID_QUATERNARY_TDM_RX:

	case AFE_PORT_ID_QUINARY_TDM_RX:

	case AFE_PORT_ID_PRIMARY_TDM_TX:

	case AFE_PORT_ID_SECONDARY_TDM_TX:

	case AFE_PORT_ID_TERTIARY_TDM_TX:

	case AFE_PORT_ID_QUATERNARY_TDM_TX:

	case AFE_PORT_ID_QUINARY_TDM_TX:

		slot_offset = tdm_slot_offset[TDM_0];

		break;

	default:

		pr_err("%s: dai id 0x%x not supported\n",

			__func__, cpu_dai->id);

		return -EINVAL;

	}



	for (i = 0; i < TDM_SLOT_OFFSET_MAX; i++) {

		if (slot_offset[i] != AFE_SLOT_MAPPING_OFFSET_INVALID)

			offset_channels++;

		else

			break;

	}



	if (offset_channels == 0) {

		pr_err("%s: slot offset not supported, offset_channels %d\n",

			__func__, offset_channels);

		return -EINVAL;

	}



	if (channels > offset_channels) {

		pr_err("%s: channels %d exceed offset_channels %d\n",

			__func__, channels, offset_channels);

		return -EINVAL;

	}



	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {

		ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,

					       slots, slot_width);

		if (ret < 0) {

			pr_err("%s: failed to set tdm slot, err:%d\n",

				__func__, ret);

			goto end;

		}



		ret = snd_soc_dai_set_channel_map(cpu_dai, 0, NULL,

						  channels, slot_offset);

		if (ret < 0) {

			pr_err("%s: failed to set channel map, err:%d\n",

				__func__, ret);

			goto end;

		}

	} else {

		ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,

					       slots, slot_width);

		if (ret < 0) {

			pr_err("%s: failed to set tdm slot, err:%d\n",

				__func__, ret);

			goto end;

		}



		ret = snd_soc_dai_set_channel_map(cpu_dai, channels,

						  slot_offset, 0, NULL);

		if (ret < 0) {

			pr_err("%s: failed to set channel map, err:%d\n",

				__func__, ret);

			goto end;

		}

	}

end:

	return ret;

}



static int msm_snd_card_late_probe(struct snd_soc_card *card)

{

	const char *be_dl_name = LPASS_BE_INT0_MI2S_RX;
@@ -1610,7 +1439,9 @@ static int msm_snd_card_late_probe(struct snd_soc_card *card) 
}



static struct snd_soc_ops msm_tdm_be_ops = {

	.hw_params = msm_tdm_snd_hw_params

	.startup = msm_tdm_snd_startup,

	.shutdown = msm_tdm_snd_shutdown,

	.hw_params = msm_tdm_snd_hw_params,

};



static struct snd_soc_ops msm_wcn_ops = {