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Commit 5f7ecd4e authored by Alexander Shiyan's avatar Alexander Shiyan Committed by Shawn Guo
Browse files

ARM: dts: imx53-evk: Remove board support 



imx53-evk board is discontinued by Freescale. The replacement is
imx53-qsb. Additionally this board is not supported by anyone and
in their current state is non-functional, for example PMIC not have
an IRQ line defined, so it is not works. This patch removes this DTS.

Signed-off-by: default avatarAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
parent 2bc88b1b

arch/arm/boot/dts/Makefile

+0 −1
Original line number Diff line number Diff line
@@ -149,7 +149,6 @@ dtb-$(CONFIG_ARCH_MXC) += \ 
	imx51-babbage.dtb \

	imx51-eukrea-mbimxsd51-baseboard.dtb \

	imx53-ard.dtb \

	imx53-evk.dtb \

	imx53-m53evk.dtb \

	imx53-mba53.dtb \

	imx53-qsb.dtb \

arch/arm/boot/dts/imx53-evk.dts

deleted100644 → 0
+0 −189
Original line number Diff line number Diff line 
/*

 * Copyright 2011 Freescale Semiconductor, Inc.

 * Copyright 2011 Linaro Ltd.

 *

 * The code contained herein is licensed under the GNU General Public

 * License. You may obtain a copy of the GNU General Public License

 * Version 2 or later at the following locations:

 *

 * http://www.opensource.org/licenses/gpl-license.html

 * http://www.gnu.org/copyleft/gpl.html

 */



/dts-v1/;

#include "imx53.dtsi"



/ {

	model = "Freescale i.MX53 Evaluation Kit";

	compatible = "fsl,imx53-evk", "fsl,imx53";



	memory {

		reg = <0x70000000 0x80000000>;

	};



	leds {

		compatible = "gpio-leds";



		green {

			label = "Heartbeat";

			gpios = <&gpio7 7 0>;

			linux,default-trigger = "heartbeat";

		};

	};

};



&esdhc1 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_esdhc1>;

	cd-gpios = <&gpio3 13 0>;

	wp-gpios = <&gpio3 14 0>;

	status = "okay";

};



&ecspi1 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_ecspi1>;

	fsl,spi-num-chipselects = <2>;

	cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>;

	status = "okay";



	flash: at45db321d@1 {

		#address-cells = <1>;

		#size-cells = <1>;

		compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash";

		spi-max-frequency = <25000000>;

		reg = <1>;



		partition@0 {

			label = "U-Boot";

			reg = <0x0 0x40000>;

			read-only;

		};



		partition@40000 {

			label = "Kernel";

			reg = <0x40000 0x3c0000>;

		};

	};

};



&esdhc3 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_esdhc3>;

	cd-gpios = <&gpio3 11 0>;

	wp-gpios = <&gpio3 12 0>;

	status = "okay";

};



&iomuxc {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_hog>;



	imx53-evk {

		pinctrl_hog: hoggrp {

			fsl,pins = <

				MX53_PAD_EIM_EB2__GPIO2_30  0x80000000

				MX53_PAD_EIM_D19__GPIO3_19  0x80000000

				MX53_PAD_EIM_DA11__GPIO3_11 0x80000000

				MX53_PAD_EIM_DA12__GPIO3_12 0x80000000

				MX53_PAD_EIM_DA13__GPIO3_13 0x80000000

				MX53_PAD_EIM_DA14__GPIO3_14 0x80000000

				MX53_PAD_PATA_DA_0__GPIO7_6 0x80000000

				MX53_PAD_PATA_DA_1__GPIO7_7 0x80000000

			>;

		};



		pinctrl_ecspi1: ecspi1grp {

			fsl,pins = <

				MX53_PAD_EIM_D16__ECSPI1_SCLK		0x80000000

				MX53_PAD_EIM_D17__ECSPI1_MISO		0x80000000

				MX53_PAD_EIM_D18__ECSPI1_MOSI		0x80000000

			>;

		};



		pinctrl_esdhc1: esdhc1grp {

			fsl,pins = <

				MX53_PAD_SD1_DATA0__ESDHC1_DAT0		0x1d5

				MX53_PAD_SD1_DATA1__ESDHC1_DAT1		0x1d5

				MX53_PAD_SD1_DATA2__ESDHC1_DAT2		0x1d5

				MX53_PAD_SD1_DATA3__ESDHC1_DAT3		0x1d5

				MX53_PAD_SD1_CMD__ESDHC1_CMD		0x1d5

				MX53_PAD_SD1_CLK__ESDHC1_CLK		0x1d5

			>;

		};



		pinctrl_esdhc3: esdhc3grp {

			fsl,pins = <

				MX53_PAD_PATA_DATA8__ESDHC3_DAT0	0x1d5

				MX53_PAD_PATA_DATA9__ESDHC3_DAT1	0x1d5

				MX53_PAD_PATA_DATA10__ESDHC3_DAT2	0x1d5

				MX53_PAD_PATA_DATA11__ESDHC3_DAT3	0x1d5

				MX53_PAD_PATA_DATA0__ESDHC3_DAT4	0x1d5

				MX53_PAD_PATA_DATA1__ESDHC3_DAT5	0x1d5

				MX53_PAD_PATA_DATA2__ESDHC3_DAT6	0x1d5

				MX53_PAD_PATA_DATA3__ESDHC3_DAT7	0x1d5

				MX53_PAD_PATA_RESET_B__ESDHC3_CMD	0x1d5

				MX53_PAD_PATA_IORDY__ESDHC3_CLK		0x1d5

			>;

		};



		pinctrl_fec: fecgrp {

			fsl,pins = <

				MX53_PAD_FEC_MDC__FEC_MDC		0x80000000

				MX53_PAD_FEC_MDIO__FEC_MDIO		0x80000000

				MX53_PAD_FEC_REF_CLK__FEC_TX_CLK	0x80000000

				MX53_PAD_FEC_RX_ER__FEC_RX_ER		0x80000000

				MX53_PAD_FEC_CRS_DV__FEC_RX_DV		0x80000000

				MX53_PAD_FEC_RXD1__FEC_RDATA_1		0x80000000

				MX53_PAD_FEC_RXD0__FEC_RDATA_0		0x80000000

				MX53_PAD_FEC_TX_EN__FEC_TX_EN		0x80000000

				MX53_PAD_FEC_TXD1__FEC_TDATA_1		0x80000000

				MX53_PAD_FEC_TXD0__FEC_TDATA_0		0x80000000

			>;

		};



		pinctrl_i2c2: i2c2grp {

			fsl,pins = <

				MX53_PAD_KEY_ROW3__I2C2_SDA		0xc0000000

				MX53_PAD_KEY_COL3__I2C2_SCL		0xc0000000

			>;

		};



		pinctrl_uart1: uart1grp {

			fsl,pins = <

				MX53_PAD_CSI0_DAT10__UART1_TXD_MUX	0x1e4

				MX53_PAD_CSI0_DAT11__UART1_RXD_MUX	0x1e4

			>;

		};

	};

};



&uart1 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_uart1>;

	status = "okay";

};



&i2c2 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_i2c2>;

	status = "okay";



	pmic: mc13892@08 {

		compatible = "fsl,mc13892", "fsl,mc13xxx";

		reg = <0x08>;

	};



	codec: sgtl5000@0a {

		compatible = "fsl,sgtl5000";

		reg = <0x0a>;

	};

};



&fec {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_fec>;

	phy-mode = "rmii";

	phy-reset-gpios = <&gpio7 6 0>;

	status = "okay";

};