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Commit 5ceae169 authored by Sinan Kaya's avatar Sinan Kaya Committed by Bjorn Helgaas
Browse files

video: fbdev: nvidia: deprecate pci_get_bus_and_slot()



pci_get_bus_and_slot() is restrictive such that it assumes domain=0 as
where a PCI device is present. This restricts the device drivers to be
reused for other domain numbers.

Getting ready to remove pci_get_bus_and_slot() function in favor of
pci_get_domain_bus_and_slot().

struct nvidia_par has a pointer to struct pci_dev. Use the pci_dev
member to extract the domain information and pass it to
pci_get_domain_bus_and_slot() function.

Signed-off-by: default avatarSinan Kaya <okaya@codeaurora.org>
Signed-off-by: default avatarBjorn Helgaas <helgaas@kernel.org>
Acked-by: default avatarBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
parent e587467a
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+6 −5
Original line number Diff line number Diff line
@@ -683,10 +683,11 @@ static void nForceUpdateArbitrationSettings(unsigned VClk,
	nv10_sim_state sim_data;
	unsigned int M, N, P, pll, MClk, NVClk, memctrl;
	struct pci_dev *dev;
	int domain = pci_domain_nr(par->pci_dev->bus);

	if ((par->Chipset & 0x0FF0) == 0x01A0) {
		unsigned int uMClkPostDiv;
		dev = pci_get_bus_and_slot(0, 3);
		dev = pci_get_domain_bus_and_slot(domain, 0, 3);
		pci_read_config_dword(dev, 0x6C, &uMClkPostDiv);
		uMClkPostDiv = (uMClkPostDiv >> 8) & 0xf;

@@ -694,7 +695,7 @@ static void nForceUpdateArbitrationSettings(unsigned VClk,
			uMClkPostDiv = 4;
		MClk = 400000 / uMClkPostDiv;
	} else {
		dev = pci_get_bus_and_slot(0, 5);
		dev = pci_get_domain_bus_and_slot(domain, 0, 5);
		pci_read_config_dword(dev, 0x4c, &MClk);
		MClk /= 1000;
	}
@@ -707,13 +708,13 @@ static void nForceUpdateArbitrationSettings(unsigned VClk,
	sim_data.pix_bpp = (char)pixelDepth;
	sim_data.enable_video = 0;
	sim_data.enable_mp = 0;
	dev = pci_get_bus_and_slot(0, 1);
	dev = pci_get_domain_bus_and_slot(domain, 0, 1);
	pci_read_config_dword(dev, 0x7C, &sim_data.memory_type);
	pci_dev_put(dev);
	sim_data.memory_type = (sim_data.memory_type >> 12) & 1;
	sim_data.memory_width = 64;

	dev = pci_get_bus_and_slot(0, 3);
	dev = pci_get_domain_bus_and_slot(domain, 0, 3);
	pci_read_config_dword(dev, 0, &memctrl);
	pci_dev_put(dev);
	memctrl >>= 16;
@@ -721,7 +722,7 @@ static void nForceUpdateArbitrationSettings(unsigned VClk,
	if ((memctrl == 0x1A9) || (memctrl == 0x1AB) || (memctrl == 0x1ED)) {
		u32 dimm[3];

		dev = pci_get_bus_and_slot(0, 2);
		dev = pci_get_domain_bus_and_slot(domain, 0, 2);
		pci_read_config_dword(dev, 0x40, &dimm[0]);
		dimm[0] = (dimm[0] >> 8) & 0x4f;
		pci_read_config_dword(dev, 0x44, &dimm[1]);
+2 −1
Original line number Diff line number Diff line
@@ -264,7 +264,8 @@ static void nv10GetConfig(struct nvidia_par *par)
	}
#endif

	dev = pci_get_bus_and_slot(0, 1);
	dev = pci_get_domain_bus_and_slot(pci_domain_nr(par->pci_dev->bus),
					  0, 1);
	if ((par->Chipset & 0xffff) == 0x01a0) {
		u32 amt;