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Commit 5a90865e authored by Vijayanand Jitta's avatar Vijayanand Jitta
Browse files

ARM: dts: msm: add smmu capture bus interrupts for trinket 



capture bus of smmu has interrupts which get triggered on a
transaction match, add them for both apps and gfx smmu on trinket.

Change-Id: I9e3b9479967db3df343f3776835c52996d248a17
Signed-off-by: default avatarVijayanand Jitta <vjitta@codeaurora.org>
parent ab3f3144

arch/arm64/boot/dts/qcom/msm-arm-smmu-trinket.dtsi

+5 −0
Original line number Diff line number Diff line
@@ -55,6 +55,7 @@ 
				<0x59c2200 0x8>;

			reg-names = "base", "status-reg";

			qcom,stream-id-range = <0x0 0x400>;

			interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;

		};

	};
@@ -153,6 +154,7 @@ 
				<0xc782200 0x8>;

			reg-names = "base", "status-reg";

			qcom,stream-id-range = <0x0 0x400>;

			interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;

			qcom,msm-bus,name = "apps_smmu";

			qcom,msm-bus,num-cases = <2>;

			qcom,msm-bus,active-only;
@@ -178,6 +180,7 @@ 
				<0xc782208 0x8>;

			reg-names = "base", "status-reg";

			qcom,stream-id-range = <0x400 0x400>;

			interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;

			qcom,regulator-names = "vdd";

			vdd-supply = <&hlos1_vote_mm_snoc_mmu_tbu_rt_gdsc>;

			qcom,msm-bus,name = "apps_smmu";
@@ -205,6 +208,7 @@ 
				<0xc782210 0x8>;

			reg-names = "base", "status-reg";

			qcom,stream-id-range = <0x800 0x400>;

			interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;

			qcom,regulator-names = "vdd";

			vdd-supply = <&hlos1_vote_mm_snoc_mmu_tbu_nrt_gdsc>;

			qcom,msm-bus,name = "apps_smmu";
@@ -232,6 +236,7 @@ 
				<0xc782218 0x8>;

			reg-names = "base", "status-reg";

			qcom,stream-id-range = <0xc00 0x400>;

			interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;

			qcom,regulator-names = "vdd";

			vdd-supply = <&hlos1_vote_turing_mmu_tbu0_gdsc>;

			qcom,msm-bus,name = "apps_smmu";