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Commit 59037b92 authored by Pankaj Dubey's avatar Pankaj Dubey Committed by Tomasz Figa
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clk: samsung: exynos3250: fix width and shift of div_spi0_isp clock 



Update shift and width field of div_spi0_isp clock as per Exynos3250
user manual.

Signed-off-by: default avatarPankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: default avatarKrzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: default avatarTomasz Figa <tomasz.figa@gmail.com>
parent 5ce37f26

drivers/clk/samsung/clk-exynos3250.c

+1 −1
Original line number Diff line number Diff line
@@ -424,7 +424,7 @@ static struct samsung_div_clock div_clks[] __initdata = { 
	DIV(CLK_DIV_SPI1_ISP, "div_spi1_isp", "mout_spi1_isp", DIV_ISP, 16, 4),

	DIV_F(CLK_DIV_SPI0_ISP_PRE, "div_spi0_isp_pre", "div_spi0_isp",

		DIV_ISP, 8, 8, CLK_SET_RATE_PARENT, 0),

	DIV(CLK_DIV_SPI0_ISP, "div_spi0_isp", "mout_spi0_isp", DIV_ISP, 0, 4),

	DIV(CLK_DIV_SPI0_ISP, "div_spi0_isp", "mout_spi0_isp", DIV_ISP, 4, 4),



	/* DIV_FSYS0 */

	DIV_F(CLK_DIV_TSADC_PRE, "div_tsadc_pre", "div_tsadc", DIV_FSYS0, 8, 8,