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Commit 57b6560a authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "defconfig: Enable branch predictor hardening on sm8150"

parents 1c044623 c6346630

arch/arm64/configs/vendor/sm8150-perf_defconfig

+0 −1
Original line number Diff line number Diff line
@@ -74,7 +74,6 @@ CONFIG_ZSMALLOC=y 
CONFIG_BALANCE_ANON_FILE_RECLAIM=y

CONFIG_SECCOMP=y

# CONFIG_UNMAP_KERNEL_AT_EL0 is not set

# CONFIG_HARDEN_BRANCH_PREDICTOR is not set

CONFIG_ARMV8_DEPRECATED=y

CONFIG_SWP_EMULATION=y

CONFIG_CP15_BARRIER_EMULATION=y

arch/arm64/configs/vendor/sm8150_defconfig

+0 −1
Original line number Diff line number Diff line
@@ -80,7 +80,6 @@ CONFIG_ZSMALLOC=y 
CONFIG_BALANCE_ANON_FILE_RECLAIM=y

CONFIG_SECCOMP=y

# CONFIG_UNMAP_KERNEL_AT_EL0 is not set

# CONFIG_HARDEN_BRANCH_PREDICTOR is not set

CONFIG_PRINT_VMEMLAYOUT=y

CONFIG_ARMV8_DEPRECATED=y

CONFIG_SWP_EMULATION=y

arch/arm64/include/asm/cputype.h

+2 −0
Original line number Diff line number Diff line
@@ -87,6 +87,7 @@ 
#define ARM_CPU_PART_CORTEX_A75		0xD0A

#define ARM_CPU_PART_KRYO3S		0x803

#define ARM_CPU_PART_KRYO4S		0x803

#define ARM_CPU_PART_KRYO4G		0x804



#define APM_CPU_PART_POTENZA		0x000
@@ -112,6 +113,7 @@ 
#define MIDR_CORTEX_A75 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A75)

#define MIDR_KRYO3S	MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, ARM_CPU_PART_KRYO3S)

#define MIDR_KRYO4S	MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, ARM_CPU_PART_KRYO4S)

#define MIDR_KRYO4G	MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, ARM_CPU_PART_KRYO4G)

#define MIDR_THUNDERX	MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX)

#define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX)

#define MIDR_THUNDERX_83XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_83XX)

arch/arm64/kernel/cpu_errata.c

+5 −0
Original line number Diff line number Diff line
@@ -574,6 +574,11 @@ const struct arm64_cpu_capabilities arm64_errata[] = { 
		MIDR_ALL_VERSIONS(MIDR_CAVIUM_THUNDERX2),

		.enable = enable_smccc_arch_workaround_1,

	},

	{

		.capability = ARM64_HARDEN_BRANCH_PREDICTOR,

		MIDR_ALL_VERSIONS(MIDR_KRYO4G),

		.enable = enable_smccc_arch_workaround_1,

	},

#endif

#ifdef CONFIG_ARM64_SSBD

	{