Loading Documentation/devicetree/bindings/dma/snps-dma.txt +8 −3 Original line number Diff line number Diff line Loading @@ -13,6 +13,11 @@ Required properties: - chan_priority: priority of channels. 0 (default): increase from chan 0->n, 1: increase from chan n->0 - block_size: Maximum block size supported by the controller - data-width: Maximum data width supported by hardware per AHB master (in bytes, power of 2) Deprecated properties: - data_width: Maximum data width supported by hardware per AHB master (0 - 8bits, 1 - 16bits, ..., 5 - 256bits) Loading @@ -38,7 +43,7 @@ Example: chan_allocation_order = <1>; chan_priority = <1>; block_size = <0xfff>; data_width = <3 3>; data-width = <8 8>; }; DMA clients connected to the Designware DMA controller must use the format Loading @@ -47,8 +52,8 @@ The four cells in order are: 1. A phandle pointing to the DMA controller 2. The DMA request line number 3. Source master for transfers on allocated channel 4. Destination master for transfers on allocated channel 3. Memory master for transfers on allocated channel 4. Peripheral master for transfers on allocated channel Example: Loading arch/arc/boot/dts/abilis_tb10x.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -112,7 +112,7 @@ chan_allocation_order = <0>; chan_priority = <1>; block_size = <0x7ff>; data_width = <2>; data-width = <4>; clocks = <&ahb_clk>; clock-names = "hclk"; }; Loading arch/arm/boot/dts/spear13xx.dtsi +2 −2 Original line number Diff line number Diff line Loading @@ -117,7 +117,7 @@ chan_priority = <1>; block_size = <0xfff>; dma-masters = <2>; data_width = <3 3>; data-width = <8 8>; }; dma@eb000000 { Loading @@ -133,7 +133,7 @@ chan_allocation_order = <1>; chan_priority = <1>; block_size = <0xfff>; data_width = <3 3>; data-width = <8 8>; }; fsmc: flash@b0000000 { Loading arch/avr32/mach-at32ap/at32ap700x.c +8 −8 Original line number Diff line number Diff line Loading @@ -1365,8 +1365,8 @@ at32_add_device_mci(unsigned int id, struct mci_platform_data *data) slave->dma_dev = &dw_dmac0_device.dev; slave->src_id = 0; slave->dst_id = 1; slave->src_master = 1; slave->dst_master = 0; slave->m_master = 1; slave->p_master = 0; data->dma_slave = slave; data->dma_filter = at32_mci_dma_filter; Loading Loading @@ -2061,16 +2061,16 @@ at32_add_device_ac97c(unsigned int id, struct ac97c_platform_data *data, if (flags & AC97C_CAPTURE) { rx_dws->dma_dev = &dw_dmac0_device.dev; rx_dws->src_id = 3; rx_dws->src_master = 0; rx_dws->dst_master = 1; rx_dws->m_master = 0; rx_dws->p_master = 1; } /* Check if DMA slave interface for playback should be configured. */ if (flags & AC97C_PLAYBACK) { tx_dws->dma_dev = &dw_dmac0_device.dev; tx_dws->dst_id = 4; tx_dws->src_master = 0; tx_dws->dst_master = 1; tx_dws->m_master = 0; tx_dws->p_master = 1; } if (platform_device_add_data(pdev, data, Loading Loading @@ -2141,8 +2141,8 @@ at32_add_device_abdac(unsigned int id, struct atmel_abdac_pdata *data) dws->dma_dev = &dw_dmac0_device.dev; dws->dst_id = 2; dws->src_master = 0; dws->dst_master = 1; dws->m_master = 0; dws->p_master = 1; if (platform_device_add_data(pdev, data, sizeof(struct atmel_abdac_pdata))) Loading drivers/ata/sata_dwc_460ex.c +3 −3 Original line number Diff line number Diff line Loading @@ -201,8 +201,8 @@ static struct sata_dwc_host_priv host_pvt; static struct dw_dma_slave sata_dwc_dma_dws = { .src_id = 0, .dst_id = 0, .src_master = 0, .dst_master = 1, .m_master = 1, .p_master = 0, }; /* Loading Loading @@ -1248,7 +1248,7 @@ static int sata_dwc_probe(struct platform_device *ofdev) hsdev->dma->dev = &ofdev->dev; /* Initialize AHB DMAC */ err = dw_dma_probe(hsdev->dma, NULL); err = dw_dma_probe(hsdev->dma); if (err) goto error_dma_iomap; Loading Loading
Documentation/devicetree/bindings/dma/snps-dma.txt +8 −3 Original line number Diff line number Diff line Loading @@ -13,6 +13,11 @@ Required properties: - chan_priority: priority of channels. 0 (default): increase from chan 0->n, 1: increase from chan n->0 - block_size: Maximum block size supported by the controller - data-width: Maximum data width supported by hardware per AHB master (in bytes, power of 2) Deprecated properties: - data_width: Maximum data width supported by hardware per AHB master (0 - 8bits, 1 - 16bits, ..., 5 - 256bits) Loading @@ -38,7 +43,7 @@ Example: chan_allocation_order = <1>; chan_priority = <1>; block_size = <0xfff>; data_width = <3 3>; data-width = <8 8>; }; DMA clients connected to the Designware DMA controller must use the format Loading @@ -47,8 +52,8 @@ The four cells in order are: 1. A phandle pointing to the DMA controller 2. The DMA request line number 3. Source master for transfers on allocated channel 4. Destination master for transfers on allocated channel 3. Memory master for transfers on allocated channel 4. Peripheral master for transfers on allocated channel Example: Loading
arch/arc/boot/dts/abilis_tb10x.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -112,7 +112,7 @@ chan_allocation_order = <0>; chan_priority = <1>; block_size = <0x7ff>; data_width = <2>; data-width = <4>; clocks = <&ahb_clk>; clock-names = "hclk"; }; Loading
arch/arm/boot/dts/spear13xx.dtsi +2 −2 Original line number Diff line number Diff line Loading @@ -117,7 +117,7 @@ chan_priority = <1>; block_size = <0xfff>; dma-masters = <2>; data_width = <3 3>; data-width = <8 8>; }; dma@eb000000 { Loading @@ -133,7 +133,7 @@ chan_allocation_order = <1>; chan_priority = <1>; block_size = <0xfff>; data_width = <3 3>; data-width = <8 8>; }; fsmc: flash@b0000000 { Loading
arch/avr32/mach-at32ap/at32ap700x.c +8 −8 Original line number Diff line number Diff line Loading @@ -1365,8 +1365,8 @@ at32_add_device_mci(unsigned int id, struct mci_platform_data *data) slave->dma_dev = &dw_dmac0_device.dev; slave->src_id = 0; slave->dst_id = 1; slave->src_master = 1; slave->dst_master = 0; slave->m_master = 1; slave->p_master = 0; data->dma_slave = slave; data->dma_filter = at32_mci_dma_filter; Loading Loading @@ -2061,16 +2061,16 @@ at32_add_device_ac97c(unsigned int id, struct ac97c_platform_data *data, if (flags & AC97C_CAPTURE) { rx_dws->dma_dev = &dw_dmac0_device.dev; rx_dws->src_id = 3; rx_dws->src_master = 0; rx_dws->dst_master = 1; rx_dws->m_master = 0; rx_dws->p_master = 1; } /* Check if DMA slave interface for playback should be configured. */ if (flags & AC97C_PLAYBACK) { tx_dws->dma_dev = &dw_dmac0_device.dev; tx_dws->dst_id = 4; tx_dws->src_master = 0; tx_dws->dst_master = 1; tx_dws->m_master = 0; tx_dws->p_master = 1; } if (platform_device_add_data(pdev, data, Loading Loading @@ -2141,8 +2141,8 @@ at32_add_device_abdac(unsigned int id, struct atmel_abdac_pdata *data) dws->dma_dev = &dw_dmac0_device.dev; dws->dst_id = 2; dws->src_master = 0; dws->dst_master = 1; dws->m_master = 0; dws->p_master = 1; if (platform_device_add_data(pdev, data, sizeof(struct atmel_abdac_pdata))) Loading
drivers/ata/sata_dwc_460ex.c +3 −3 Original line number Diff line number Diff line Loading @@ -201,8 +201,8 @@ static struct sata_dwc_host_priv host_pvt; static struct dw_dma_slave sata_dwc_dma_dws = { .src_id = 0, .dst_id = 0, .src_master = 0, .dst_master = 1, .m_master = 1, .p_master = 0, }; /* Loading Loading @@ -1248,7 +1248,7 @@ static int sata_dwc_probe(struct platform_device *ofdev) hsdev->dma->dev = &ofdev->dev; /* Initialize AHB DMAC */ err = dw_dma_probe(hsdev->dma, NULL); err = dw_dma_probe(hsdev->dma); if (err) goto error_dma_iomap; Loading