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Commit 5610db61 authored by Michael Hennerich's avatar Michael Hennerich Committed by Bryan Wu
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Blackfin arch: Add Support for Peripheral PortMux and resouce allocation 



Signed-off-by: default avatarMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: default avatarBryan Wu <bryan.wu@analog.com>
parent 520473b0

arch/blackfin/mach-bf548/gpio.c

+160 −29
Original line number Diff line number Diff line
@@ -31,6 +31,7 @@ 
#include <linux/err.h>

#include <asm/blackfin.h>

#include <asm/gpio.h>

#include <asm/portmux.h>

#include <linux/irq.h>



static struct gpio_port_t *gpio_array[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
@@ -46,23 +47,48 @@ static struct gpio_port_t *gpio_array[gpio_bank(MAX_BLACKFIN_GPIOS)] = { 
	(struct gpio_port_t *)PORTJ_FER,

};



static unsigned short reserved_map[gpio_bank(MAX_BLACKFIN_GPIOS)];

static unsigned short reserved_gpio_map[gpio_bank(MAX_BLACKFIN_GPIOS)];

static unsigned short reserved_peri_map[gpio_bank(MAX_BLACKFIN_GPIOS)];



inline int check_gpio(unsigned short gpio)

{

	if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15 \

			|| gpio == GPIO_PH14 || gpio == GPIO_PH15 \

			|| gpio == GPIO_PJ14 || gpio == GPIO_PJ15 \

	if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15

	    || gpio == GPIO_PH14 || gpio == GPIO_PH15

	    || gpio == GPIO_PJ14 || gpio == GPIO_PJ15

	    || gpio > MAX_BLACKFIN_GPIOS)

		return -EINVAL;

	return 0;

}



inline void portmux_setup(unsigned short portno, unsigned short function)

{

	u32 pmux;



	pmux = gpio_array[gpio_bank(portno)]->port_mux;



	pmux &= ~(0x3 << (2 * gpio_sub_n(portno)));

	pmux |= (function & 0x3) << (2 * gpio_sub_n(portno));



	gpio_array[gpio_bank(portno)]->port_mux = pmux;



}



inline u16 get_portmux(unsigned short portno)

{

	u32 pmux;



	pmux = gpio_array[gpio_bank(portno)]->port_mux;



	return (pmux >> (2 * gpio_sub_n(portno)) & 0x3);



}



static void port_setup(unsigned short gpio, unsigned short usage)

{

	if (usage == GPIO_USAGE) {

		if (gpio_array[gpio_bank(gpio)]->port_fer & gpio_bit(gpio))

			printk(KERN_WARNING "bfin-gpio: Possible Conflict with Peripheral "

			printk(KERN_WARNING

			       "bfin-gpio: Possible Conflict with Peripheral "

			       "usage and GPIO %d detected!\n", gpio);

		gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio);

	} else
@@ -72,18 +98,116 @@ static void port_setup(unsigned short gpio, unsigned short usage) 


static int __init bfin_gpio_init(void)

{

	int i;



	printk(KERN_INFO "Blackfin GPIO Controller\n");



	for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE)

		reserved_map[gpio_bank(i)] = 0;



	return 0;

}



arch_initcall(bfin_gpio_init);



int peripheral_request(unsigned short per, const char *label)

{

	unsigned long flags;

	unsigned short ident = P_IDENT(per);



	if (!(per & P_DEFINED))

		return -ENODEV;



	if (check_gpio(ident) < 0)

		return -EINVAL;



	local_irq_save(flags);



	if (unlikely(reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) {

		printk(KERN_ERR

		       "%s: Peripheral %d is already reserved as GPIO!\n",

		       __FUNCTION__, per);

		dump_stack();

		local_irq_restore(flags);

		return -EBUSY;

	}



	if (unlikely(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident))) {



		u16 funct = get_portmux(ident);



		if (!((per & P_MAYSHARE) && (funct == P_FUNCT2MUX(per)))) {

			printk(KERN_ERR

			       "%s: Peripheral %d is already reserved!\n",

			       __FUNCTION__, per);

			dump_stack();

			local_irq_restore(flags);

			return -EBUSY;

		}

	}



	reserved_peri_map[gpio_bank(ident)] |= gpio_bit(ident);



	portmux_setup(ident, P_FUNCT2MUX(per));

	port_setup(ident, PERIPHERAL_USAGE);



	local_irq_restore(flags);



	return 0;

}

EXPORT_SYMBOL(peripheral_request);



int peripheral_request_list(unsigned short per[], const char *label)

{



	u16 cnt;

	int ret;



	for (cnt = 0; per[cnt] != 0; cnt++) {

		ret = peripheral_request(per[cnt], label);

		if (ret < 0)

			return ret;

	}



	return 0;

}

EXPORT_SYMBOL(peripheral_request_list);



void peripheral_free(unsigned short per)

{

	unsigned long flags;

	unsigned short ident = P_IDENT(per);



	if (!(per & P_DEFINED))

		return;



	if (check_gpio(ident) < 0)

		return;



	local_irq_save(flags);



	if (unlikely(!(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident)))) {

		printk(KERN_ERR "bfin-gpio: Peripheral %d wasn't reserved!\n", per);

		dump_stack();

		local_irq_restore(flags);

		return;

	}



	if (!(per & P_MAYSHARE)) {

		port_setup(ident, GPIO_USAGE);

	}



	reserved_peri_map[gpio_bank(ident)] &= ~gpio_bit(ident);



	local_irq_restore(flags);

}

EXPORT_SYMBOL(peripheral_free);



void peripheral_free_list(unsigned short per[])

{

	u16 cnt;



	for (cnt = 0; per[cnt] != 0; cnt++) {

		peripheral_free(per[cnt]);

	}



}

EXPORT_SYMBOL(peripheral_free_list);



/***********************************************************

*
@@ -109,13 +233,22 @@ int gpio_request(unsigned short gpio, const char *label) 


	local_irq_save(flags);



	if (unlikely(reserved_map[gpio_bank(gpio)] & gpio_bit(gpio))) {

	if (unlikely(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {

		printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved!\n", gpio);

		dump_stack();

		local_irq_restore(flags);

		return -EBUSY;

	}

	reserved_map[gpio_bank(gpio)] |= gpio_bit(gpio);



	if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) {

		printk(KERN_ERR

		       "bfin-gpio: GPIO %d is already reserved as Peripheral!\n", gpio);

		dump_stack();

		local_irq_restore(flags);

		return -EBUSY;

	}



	reserved_gpio_map[gpio_bank(gpio)] |= gpio_bit(gpio);



	local_irq_restore(flags);
@@ -125,7 +258,6 @@ int gpio_request(unsigned short gpio, const char *label) 
}

EXPORT_SYMBOL(gpio_request);





void gpio_free(unsigned short gpio)

{

	unsigned long flags;
@@ -135,25 +267,24 @@ void gpio_free(unsigned short gpio) 


	local_irq_save(flags);



	if (unlikely(!(reserved_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {

	if (unlikely(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {

		printk(KERN_ERR "bfin-gpio: GPIO %d wasn't reserved!\n", gpio);

		dump_stack();

		local_irq_restore(flags);

		return;

	}



	reserved_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);

	reserved_gpio_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);



	local_irq_restore(flags);

}

EXPORT_SYMBOL(gpio_free);





void gpio_direction_input(unsigned short gpio)

{

	unsigned long flags;



	BUG_ON(!(reserved_map[gpio_bank(gpio)] & gpio_bit(gpio)));

	BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));



	local_irq_save(flags);

	gpio_array[gpio_bank(gpio)]->port_dir_clear = gpio_bit(gpio);
@@ -166,7 +297,7 @@ void gpio_direction_output(unsigned short gpio) 
{

	unsigned long flags;



	BUG_ON(!(reserved_map[gpio_bank(gpio)] & gpio_bit(gpio)));

	BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));



	local_irq_save(flags);

	gpio_array[gpio_bank(gpio)]->port_inen &= ~gpio_bit(gpio);

include/asm-blackfin/gpio.h

+50 −0
Original line number Diff line number Diff line
@@ -210,6 +210,56 @@ 


#ifdef BF561_FAMILY

#define MAX_BLACKFIN_GPIOS 48



#define	GPIO_PF0	0

#define	GPIO_PF1	1

#define	GPIO_PF2	2

#define	GPIO_PF3	3

#define	GPIO_PF4	4

#define	GPIO_PF5	5

#define	GPIO_PF6	6

#define	GPIO_PF7	7

#define	GPIO_PF8	8

#define	GPIO_PF9	9

#define	GPIO_PF10	10

#define	GPIO_PF11	11

#define	GPIO_PF12	12

#define	GPIO_PF13	13

#define	GPIO_PF14	14

#define	GPIO_PF15	15

#define	GPIO_PF16	16

#define	GPIO_PF17	17

#define	GPIO_PF18	18

#define	GPIO_PF19	19

#define	GPIO_PF20	20

#define	GPIO_PF21	21

#define	GPIO_PF22	22

#define	GPIO_PF23	23

#define	GPIO_PF24	24

#define	GPIO_PF25	25

#define	GPIO_PF26	26

#define	GPIO_PF27	27

#define	GPIO_PF28	28

#define	GPIO_PF29	29

#define	GPIO_PF30	30

#define	GPIO_PF31	31

#define	GPIO_PF32	32

#define	GPIO_PF33	33

#define	GPIO_PF34	34

#define	GPIO_PF35	35

#define	GPIO_PF36	36

#define	GPIO_PF37	37

#define	GPIO_PF38	38

#define	GPIO_PF39	39

#define	GPIO_PF40	40

#define	GPIO_PF41	41

#define	GPIO_PF42	42

#define	GPIO_PF43	43

#define	GPIO_PF44	44

#define	GPIO_PF45	45

#define	GPIO_PF46	46

#define	GPIO_PF47	47



#define PORT_FIO0 GPIO_0

#define PORT_FIO1 GPIO_16

#define PORT_FIO2 GPIO_32

include/asm-blackfin/mach-bf533/portmux.h

0 → 100644
+65 −0
Original line number Diff line number Diff line 
#ifndef _MACH_PORTMUX_H_

#define _MACH_PORTMUX_H_



#define P_PPI0_CLK	(P_DONTCARE)

#define P_PPI0_FS1	(P_DONTCARE)

#define P_PPI0_FS2	(P_DONTCARE)

#define P_PPI0_FS3	(P_DEFINED | P_IDENT(GPIO_PF3))

#define P_PPI0_D15	(P_DEFINED | P_IDENT(GPIO_PF4))

#define P_PPI0_D14	(P_DEFINED | P_IDENT(GPIO_PF5))

#define P_PPI0_D13	(P_DEFINED | P_IDENT(GPIO_PF6))

#define P_PPI0_D12	(P_DEFINED | P_IDENT(GPIO_PF7))

#define P_PPI0_D11	(P_DEFINED | P_IDENT(GPIO_PF8))

#define P_PPI0_D10	(P_DEFINED | P_IDENT(GPIO_PF9))

#define P_PPI0_D9	(P_DEFINED | P_IDENT(GPIO_PF10))

#define P_PPI0_D8	(P_DEFINED | P_IDENT(GPIO_PF11))

#define P_PPI0_D0	(P_DONTCARE)

#define P_PPI0_D1	(P_DONTCARE)

#define P_PPI0_D2	(P_DONTCARE)

#define P_PPI0_D3	(P_DONTCARE)

#define P_PPI0_D4	(P_DEFINED | P_IDENT(GPIO_PF15))

#define P_PPI0_D5	(P_DEFINED | P_IDENT(GPIO_PF14))

#define P_PPI0_D6	(P_DEFINED | P_IDENT(GPIO_PF13))

#define P_PPI0_D7	(P_DEFINED | P_IDENT(GPIO_PF12))



#define P_SPORT1_TSCLK	(P_DONTCARE)

#define P_SPORT1_RSCLK	(P_DONTCARE)

#define P_SPORT0_TSCLK	(P_DONTCARE)

#define P_SPORT0_RSCLK	(P_DONTCARE)

#define P_UART0_RX	(P_DONTCARE)

#define P_UART0_TX	(P_DONTCARE)

#define P_SPORT1_DRSEC	(P_DONTCARE)

#define P_SPORT1_RFS	(P_DONTCARE)

#define P_SPORT1_DTPRI	(P_DONTCARE)

#define P_SPORT1_DTSEC	(P_DONTCARE)

#define P_SPORT1_TFS	(P_DONTCARE)

#define P_SPORT1_DRPRI	(P_DONTCARE)

#define P_SPORT0_DRSEC	(P_DONTCARE)

#define P_SPORT0_RFS	(P_DONTCARE)

#define P_SPORT0_DTPRI	(P_DONTCARE)

#define P_SPORT0_DTSEC	(P_DONTCARE)

#define P_SPORT0_TFS	(P_DONTCARE)

#define P_SPORT0_DRPRI	(P_DONTCARE)



#define P_SPI0_MOSI	(P_DONTCARE)

#define P_SPI0_MIS0	(P_DONTCARE)

#define P_SPI0_SCK	(P_DONTCARE)

#define P_SPI0_SSEL7	(P_DEFINED | P_IDENT(GPIO_PF7))

#define P_SPI0_SSEL6	(P_DEFINED | P_IDENT(GPIO_PF6))

#define P_SPI0_SSEL5	(P_DEFINED | P_IDENT(GPIO_PF5))

#define P_SPI0_SSEL4	(P_DEFINED | P_IDENT(GPIO_PF4))

#define P_SPI0_SSEL3	(P_DEFINED | P_IDENT(GPIO_PF3))

#define P_SPI0_SSEL2	(P_DEFINED | P_IDENT(GPIO_PF2))

#define P_SPI0_SSEL1	(P_DEFINED | P_IDENT(GPIO_PF1))

#define P_SPI0_SS	(P_DEFINED | P_IDENT(GPIO_PF0))



#define P_TMR2		(P_DONTCARE)

#define P_TMR1		(P_DONTCARE)

#define P_TMR0		(P_DONTCARE)

#define P_TMRCLK	(P_DEFINED | P_IDENT(GPIO_PF1))











#endif /* _MACH_PORTMUX_H_ */

include/asm-blackfin/mach-bf537/portmux.h

0 → 100644
+109 −0
Original line number Diff line number Diff line 
#ifndef _MACH_PORTMUX_H_

#define _MACH_PORTMUX_H_



#define P_UART0_TX	(P_DEFINED | P_IDENT(GPIO_PF0) | P_FUNCT(0))

#define P_UART0_RX	(P_DEFINED | P_IDENT(GPIO_PF1) | P_FUNCT(0))

#define P_UART1_TX	(P_DEFINED | P_IDENT(GPIO_PF2) | P_FUNCT(0))

#define P_UART1_RX	(P_DEFINED | P_IDENT(GPIO_PF3) | P_FUNCT(0))

#define P_TMR5		(P_DEFINED | P_IDENT(GPIO_PF4) | P_FUNCT(0))

#define P_TMR4		(P_DEFINED | P_IDENT(GPIO_PF5) | P_FUNCT(0))

#define P_TMR3		(P_DEFINED | P_IDENT(GPIO_PF6) | P_FUNCT(0))

#define P_TMR2		(P_DEFINED | P_IDENT(GPIO_PF7) | P_FUNCT(0))

#define P_TMR1		(P_DEFINED | P_IDENT(GPIO_PF8) | P_FUNCT(0))

#define P_TMR0		(P_DEFINED | P_IDENT(GPIO_PF9) | P_FUNCT(0))

#define P_SPI0_SSEL1	(P_DEFINED | P_IDENT(GPIO_PF10) | P_FUNCT(0))

#define P_SPI0_MOSI	(P_DEFINED | P_IDENT(GPIO_PF11) | P_FUNCT(0))

#define P_SPI0_MISO	(P_DEFINED | P_IDENT(GPIO_PF12) | P_FUNCT(0))

#define P_SPI0_SCK	(P_DEFINED | P_IDENT(GPIO_PF13) | P_FUNCT(0))

#define P_SPI0_SS	(P_DEFINED | P_IDENT(GPIO_PF14) | P_FUNCT(0))

#define P_PPI0_CLK	(P_DEFINED | P_IDENT(GPIO_PF15) | P_FUNCT(0))

#define P_DMAR0		(P_DEFINED | P_IDENT(GPIO_PF0) | P_FUNCT(1))

#define P_DMAR1		(P_DEFINED | P_IDENT(GPIO_PF1) | P_FUNCT(1))

#define P_TMR7		(P_DEFINED | P_IDENT(GPIO_PF2) | P_FUNCT(1))

#define P_TMR6		(P_DEFINED | P_IDENT(GPIO_PF3) | P_FUNCT(1))

#define P_SPI0_SSEL6	(P_DEFINED | P_IDENT(GPIO_PF4) | P_FUNCT(1))

#define P_SPI0_SSEL5	(P_DEFINED | P_IDENT(GPIO_PF5) | P_FUNCT(1))

#define P_SPI0_SSEL4	(P_DEFINED | P_IDENT(GPIO_PF6) | P_FUNCT(1))

#define P_PPI0_FS3	(P_DEFINED | P_IDENT(GPIO_PF7) | P_FUNCT(1))

#define P_PPI0_FS2	(P_DEFINED | P_IDENT(GPIO_PF8) | P_FUNCT(1))

#define P_PPI0_FS1	(P_DEFINED | P_IDENT(GPIO_PF9) | P_FUNCT(1))

#define P_TACLK0	(P_DEFINED | P_IDENT(GPIO_PF14) | P_FUNCT(1))

#define P_TMRCLK	(P_DEFINED | P_IDENT(GPIO_PF15) | P_FUNCT(1))



#define P_PPI0_D0	(P_DEFINED | P_IDENT(GPIO_PG0) | P_FUNCT(0))

#define P_PPI0_D1	(P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(0))

#define P_PPI0_D2	(P_DEFINED | P_IDENT(GPIO_PG2) | P_FUNCT(0))

#define P_PPI0_D3	(P_DEFINED | P_IDENT(GPIO_PG3) | P_FUNCT(0))

#define P_PPI0_D4	(P_DEFINED | P_IDENT(GPIO_PG4) | P_FUNCT(0))

#define P_PPI0_D5	(P_DEFINED | P_IDENT(GPIO_PG5) | P_FUNCT(0))

#define P_PPI0_D6	(P_DEFINED | P_IDENT(GPIO_PG6) | P_FUNCT(0))

#define P_PPI0_D7	(P_DEFINED | P_IDENT(GPIO_PG7) | P_FUNCT(0))

#define P_PPI0_D8	(P_DEFINED | P_IDENT(GPIO_PG8) | P_FUNCT(0))

#define P_PPI0_D9	(P_DEFINED | P_IDENT(GPIO_PG9) | P_FUNCT(0))

#define P_PPI0_D10	(P_DEFINED | P_IDENT(GPIO_PG10) | P_FUNCT(0))

#define P_PPI0_D11	(P_DEFINED | P_IDENT(GPIO_PG11) | P_FUNCT(0))

#define P_PPI0_D12	(P_DEFINED | P_IDENT(GPIO_PG12) | P_FUNCT(0))

#define P_PPI0_D13	(P_DEFINED | P_IDENT(GPIO_PG13) | P_FUNCT(0))

#define P_PPI0_D14	(P_DEFINED | P_IDENT(GPIO_PG14) | P_FUNCT(0))

#define P_PPI0_D15	(P_DEFINED | P_IDENT(GPIO_PG15) | P_FUNCT(0))

#define P_SPORT1_DRSEC	(P_DEFINED | P_IDENT(GPIO_PG8) | P_FUNCT(1))

#define P_SPORT1_DTSEC	(P_DEFINED | P_IDENT(GPIO_PG9) | P_FUNCT(1))

#define P_SPORT1_RSCLK	(P_DEFINED | P_IDENT(GPIO_PG10) | P_FUNCT(1))

#define P_SPORT1_RFS	(P_DEFINED | P_IDENT(GPIO_PG11) | P_FUNCT(1))

#define P_SPORT1_DRPRI	(P_DEFINED | P_IDENT(GPIO_PG12) | P_FUNCT(1))

#define P_SPORT1_TSCLK	(P_DEFINED | P_IDENT(GPIO_PG13) | P_FUNCT(1))

#define P_SPORT1_TFS	(P_DEFINED | P_IDENT(GPIO_PG14) | P_FUNCT(1))

#define P_SPORT1_DTPRI	(P_DEFINED | P_IDENT(GPIO_PG15) | P_FUNCT(1))



#define P_MII0_ETxD0	(P_DEFINED | P_IDENT(GPIO_PH0) | P_FUNCT(0))

#define P_MII0_ETxD1	(P_DEFINED | P_IDENT(GPIO_PH1) | P_FUNCT(0))

#define P_MII0_ETxD2	(P_DEFINED | P_IDENT(GPIO_PH2) | P_FUNCT(0))

#define P_MII0_ETxD3	(P_DEFINED | P_IDENT(GPIO_PH3) | P_FUNCT(0))

#define P_MII0_ETxEN	(P_DEFINED | P_IDENT(GPIO_PH4) | P_FUNCT(0))

#define P_MII0_TxCLK	(P_DEFINED | P_IDENT(GPIO_PH5) | P_FUNCT(0))

#define P_MII0_PHYINT	(P_DEFINED | P_IDENT(GPIO_PH6) | P_FUNCT(0))

#define P_MII0_COL	(P_DEFINED | P_IDENT(GPIO_PH7) | P_FUNCT(0))

#define P_MII0_ERxD0	(P_DEFINED | P_IDENT(GPIO_PH8) | P_FUNCT(0))

#define P_MII0_ERxD1	(P_DEFINED | P_IDENT(GPIO_PH9) | P_FUNCT(0))

#define P_MII0_ERxD2	(P_DEFINED | P_IDENT(GPIO_PH10) | P_FUNCT(0))

#define P_MII0_ERxD3	(P_DEFINED | P_IDENT(GPIO_PH11) | P_FUNCT(0))

#define P_MII0_ERxDV	(P_DEFINED | P_IDENT(GPIO_PH12) | P_FUNCT(0))

#define P_MII0_ERxCLK	(P_DEFINED | P_IDENT(GPIO_PH13) | P_FUNCT(0))

#define P_MII0_ERxER	(P_DEFINED | P_IDENT(GPIO_PH14) | P_FUNCT(0))

#define P_MII0_CRS	(P_DEFINED | P_IDENT(GPIO_PH15) | P_FUNCT(0))

#define P_RMII0_REF_CLK	(P_DEFINED | P_IDENT(GPIO_PH5) | P_FUNCT(1))

#define P_RMII0_MDINT	(P_DEFINED | P_IDENT(GPIO_PH6) | P_FUNCT(1))

#define P_RMII0_CRS_DV	(P_DEFINED | P_IDENT(GPIO_PH15) | P_FUNCT(1))



#define PORT_PJ0	(GPIO_PH15 + 1)

#define PORT_PJ1	(GPIO_PH15 + 2)

#define PORT_PJ2	(GPIO_PH15 + 3)

#define PORT_PJ3	(GPIO_PH15 + 4)

#define PORT_PJ4	(GPIO_PH15 + 5)

#define PORT_PJ5	(GPIO_PH15 + 6)

#define PORT_PJ6	(GPIO_PH15 + 7)

#define PORT_PJ7	(GPIO_PH15 + 8)

#define PORT_PJ8	(GPIO_PH15 + 9)

#define PORT_PJ9	(GPIO_PH15 + 10)

#define PORT_PJ10	(GPIO_PH15 + 11)

#define PORT_PJ11	(GPIO_PH15 + 12)



#define P_MDC		(P_DEFINED | P_IDENT(PORT_PJ0) | P_FUNCT(0))

#define P_MDIO		(P_DEFINED | P_IDENT(PORT_PJ1) | P_FUNCT(0))

#define P_TWI0_SCL	(P_DEFINED | P_IDENT(PORT_PJ2) | P_FUNCT(0))

#define P_TWI0_SDA	(P_DEFINED | P_IDENT(PORT_PJ3) | P_FUNCT(0))

#define P_SPORT0_DRSEC	(P_DEFINED | P_IDENT(PORT_PJ4) | P_FUNCT(0))

#define P_SPORT0_DTSEC	(P_DEFINED | P_IDENT(PORT_PJ5) | P_FUNCT(0))

#define P_SPORT0_RSCLK	(P_DEFINED | P_IDENT(PORT_PJ6) | P_FUNCT(0))

#define P_SPORT0_RFS	(P_DEFINED | P_IDENT(PORT_PJ7) | P_FUNCT(0))

#define P_SPORT0_DRPRI	(P_DEFINED | P_IDENT(PORT_PJ8) | P_FUNCT(0))

#define P_SPORT0_TSCLK	(P_DEFINED | P_IDENT(PORT_PJ9) | P_FUNCT(0))

#define P_SPORT0_TFS	(P_DEFINED | P_IDENT(PORT_PJ10) | P_FUNCT(0))

#define P_SPORT0_DTPRI	(P_DEFINED | P_IDENT(PORT_PJ11) | P_FUNCT(1))

#define P_CAN0_RX	(P_DEFINED | P_IDENT(PORT_PJ4) | P_FUNCT(1))

#define P_CAN0_TX	(P_DEFINED | P_IDENT(PORT_PJ5) | P_FUNCT(1))

#define P_SPI0_SSEL3	(P_DEFINED | P_IDENT(PORT_PJ10) | P_FUNCT(1))

#define P_SPI0_SSEL2	(P_DEFINED | P_IDENT(PORT_PJ11) | P_FUNCT(1))

#define P_SPI0_SSEL7	(P_DEFINED | P_IDENT(PORT_PJ5) | P_FUNCT(2))



#endif /* _MACH_PORTMUX_H_ */

include/asm-blackfin/mach-bf548/portmux.h

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