Loading arch/arm64/boot/dts/qcom/dsi-panel-sw43404-amoled-dsc-fhd-plus-cmd.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -99,7 +99,7 @@ qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; qcom,compression-mode = "dsc"; qcom,mdss-dsc-slice-height = <540>; qcom,mdss-dsc-slice-height = <270>; qcom,mdss-dsc-slice-width = <540>; qcom,mdss-dsc-slice-per-pkt = <1>; qcom,mdss-dsc-bit-per-component = <8>; Loading arch/arm64/boot/dts/qcom/dsi-panel-sw43404-amoled-dsc-wqhd-cmd.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -105,7 +105,7 @@ qcom,mdss-dsi-qsync-off-commands-state = "dsi_lp_mode"; qcom,compression-mode = "dsc"; qcom,mdss-dsc-slice-height = <1440>; qcom,mdss-dsc-slice-height = <180>; qcom,mdss-dsc-slice-width = <720>; qcom,mdss-dsc-slice-per-pkt = <1>; qcom,mdss-dsc-bit-per-component = <8>; Loading arch/arm64/boot/dts/qcom/dsi-panel-sw43404-amoled-dsc-wqhd-video.dtsi +2 −1 Original line number Diff line number Diff line Loading @@ -50,8 +50,8 @@ qcom,mdss-dsi-h-left-border = <0>; qcom,mdss-dsi-panel-framerate = <60>; qcom,mdss-dsi-on-command = [ 07 01 00 00 00 00 02 01 00 39 01 00 00 00 00 03 b0 a5 00 07 01 00 00 00 00 02 01 00 39 01 00 00 00 00 06 b2 00 5d 04 80 49 15 01 00 00 00 00 02 3d 10 15 01 00 00 00 00 02 36 00 Loading @@ -62,6 +62,7 @@ 05 01 00 00 50 00 02 11 00 39 01 00 00 00 00 03 b0 34 04 39 01 00 00 00 00 05 c1 00 00 00 46 39 01 00 00 00 00 03 b0 a5 00 0a 01 00 00 00 00 80 11 00 00 89 30 80 0B 40 05 A0 02 d0 02 D0 02 D0 02 00 02 68 00 20 4e a8 00 0A 00 0C 00 23 Loading arch/arm64/boot/dts/qcom/sdmmagpie-sde-display.dtsi +27 −0 Original line number Diff line number Diff line Loading @@ -257,6 +257,13 @@ &dsi_sw43404_amoled_video { qcom,mdss-dsi-t-clk-post = <0x0A>; qcom,mdss-dsi-t-clk-pre = <0x21>; qcom,esd-check-enabled; qcom,mdss-dsi-panel-status-check-mode = "reg_read"; qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a]; qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode"; qcom,mdss-dsi-panel-status-value = <0x9c>; qcom,mdss-dsi-panel-on-check-value = <0x9c>; qcom,mdss-dsi-panel-status-read-length = <1>; qcom,mdss-dsi-display-timings { timing@0{ qcom,mdss-dsi-panel-phy-timings = [00 13 05 04 1F 1E 05 Loading @@ -268,27 +275,47 @@ }; &dsi_sw43404_amoled_cmd { qcom,ulps-enabled; qcom,mdss-dsi-t-clk-post = <0x0A>; qcom,mdss-dsi-t-clk-pre = <0x21>; qcom,esd-check-enabled; qcom,mdss-dsi-panel-status-check-mode = "reg_read"; qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a]; qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode"; qcom,mdss-dsi-panel-status-value = <0x9c>; qcom,mdss-dsi-panel-on-check-value = <0x9c>; qcom,mdss-dsi-panel-status-read-length = <1>; qcom,mdss-dsi-display-timings { timing@0{ qcom,mdss-dsi-panel-phy-timings = [00 13 05 04 1F 1E 05 05 03 02 04 00]; qcom,display-topology = <2 2 1>; qcom,default-topology-index = <0>; qcom,partial-update-enabled = "single_roi"; qcom,panel-roi-alignment = <720 180 180 180 1440 180>; }; }; }; &dsi_sw43404_amoled_fhd_plus_cmd { qcom,ulps-enabled; qcom,mdss-dsi-t-clk-post = <0x0A>; qcom,mdss-dsi-t-clk-pre = <0x21>; qcom,esd-check-enabled; qcom,mdss-dsi-panel-status-check-mode = "reg_read"; qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a]; qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode"; qcom,mdss-dsi-panel-status-value = <0x9c>; qcom,mdss-dsi-panel-on-check-value = <0x9c>; qcom,mdss-dsi-panel-status-read-length = <1>; qcom,mdss-dsi-display-timings { timing@0{ qcom,mdss-dsi-panel-phy-timings = [00 13 05 04 1F 1E 05 05 03 02 04 00]; qcom,display-topology = <1 1 1>; qcom,default-topology-index = <0>; qcom,partial-update-enabled = "single_roi"; qcom,panel-roi-alignment = <540 270 270 270 1080 270>; }; }; }; Loading Loading
arch/arm64/boot/dts/qcom/dsi-panel-sw43404-amoled-dsc-fhd-plus-cmd.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -99,7 +99,7 @@ qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; qcom,compression-mode = "dsc"; qcom,mdss-dsc-slice-height = <540>; qcom,mdss-dsc-slice-height = <270>; qcom,mdss-dsc-slice-width = <540>; qcom,mdss-dsc-slice-per-pkt = <1>; qcom,mdss-dsc-bit-per-component = <8>; Loading
arch/arm64/boot/dts/qcom/dsi-panel-sw43404-amoled-dsc-wqhd-cmd.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -105,7 +105,7 @@ qcom,mdss-dsi-qsync-off-commands-state = "dsi_lp_mode"; qcom,compression-mode = "dsc"; qcom,mdss-dsc-slice-height = <1440>; qcom,mdss-dsc-slice-height = <180>; qcom,mdss-dsc-slice-width = <720>; qcom,mdss-dsc-slice-per-pkt = <1>; qcom,mdss-dsc-bit-per-component = <8>; Loading
arch/arm64/boot/dts/qcom/dsi-panel-sw43404-amoled-dsc-wqhd-video.dtsi +2 −1 Original line number Diff line number Diff line Loading @@ -50,8 +50,8 @@ qcom,mdss-dsi-h-left-border = <0>; qcom,mdss-dsi-panel-framerate = <60>; qcom,mdss-dsi-on-command = [ 07 01 00 00 00 00 02 01 00 39 01 00 00 00 00 03 b0 a5 00 07 01 00 00 00 00 02 01 00 39 01 00 00 00 00 06 b2 00 5d 04 80 49 15 01 00 00 00 00 02 3d 10 15 01 00 00 00 00 02 36 00 Loading @@ -62,6 +62,7 @@ 05 01 00 00 50 00 02 11 00 39 01 00 00 00 00 03 b0 34 04 39 01 00 00 00 00 05 c1 00 00 00 46 39 01 00 00 00 00 03 b0 a5 00 0a 01 00 00 00 00 80 11 00 00 89 30 80 0B 40 05 A0 02 d0 02 D0 02 D0 02 00 02 68 00 20 4e a8 00 0A 00 0C 00 23 Loading
arch/arm64/boot/dts/qcom/sdmmagpie-sde-display.dtsi +27 −0 Original line number Diff line number Diff line Loading @@ -257,6 +257,13 @@ &dsi_sw43404_amoled_video { qcom,mdss-dsi-t-clk-post = <0x0A>; qcom,mdss-dsi-t-clk-pre = <0x21>; qcom,esd-check-enabled; qcom,mdss-dsi-panel-status-check-mode = "reg_read"; qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a]; qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode"; qcom,mdss-dsi-panel-status-value = <0x9c>; qcom,mdss-dsi-panel-on-check-value = <0x9c>; qcom,mdss-dsi-panel-status-read-length = <1>; qcom,mdss-dsi-display-timings { timing@0{ qcom,mdss-dsi-panel-phy-timings = [00 13 05 04 1F 1E 05 Loading @@ -268,27 +275,47 @@ }; &dsi_sw43404_amoled_cmd { qcom,ulps-enabled; qcom,mdss-dsi-t-clk-post = <0x0A>; qcom,mdss-dsi-t-clk-pre = <0x21>; qcom,esd-check-enabled; qcom,mdss-dsi-panel-status-check-mode = "reg_read"; qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a]; qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode"; qcom,mdss-dsi-panel-status-value = <0x9c>; qcom,mdss-dsi-panel-on-check-value = <0x9c>; qcom,mdss-dsi-panel-status-read-length = <1>; qcom,mdss-dsi-display-timings { timing@0{ qcom,mdss-dsi-panel-phy-timings = [00 13 05 04 1F 1E 05 05 03 02 04 00]; qcom,display-topology = <2 2 1>; qcom,default-topology-index = <0>; qcom,partial-update-enabled = "single_roi"; qcom,panel-roi-alignment = <720 180 180 180 1440 180>; }; }; }; &dsi_sw43404_amoled_fhd_plus_cmd { qcom,ulps-enabled; qcom,mdss-dsi-t-clk-post = <0x0A>; qcom,mdss-dsi-t-clk-pre = <0x21>; qcom,esd-check-enabled; qcom,mdss-dsi-panel-status-check-mode = "reg_read"; qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a]; qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode"; qcom,mdss-dsi-panel-status-value = <0x9c>; qcom,mdss-dsi-panel-on-check-value = <0x9c>; qcom,mdss-dsi-panel-status-read-length = <1>; qcom,mdss-dsi-display-timings { timing@0{ qcom,mdss-dsi-panel-phy-timings = [00 13 05 04 1F 1E 05 05 03 02 04 00]; qcom,display-topology = <1 1 1>; qcom,default-topology-index = <0>; qcom,partial-update-enabled = "single_roi"; qcom,panel-roi-alignment = <540 270 270 270 1080 270>; }; }; }; Loading