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Commit 5549725d authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
Browse files

Merge "ARM: dts: msm: Add memory dump area for Lito"

parents b42d485b b7e3e180

arch/arm64/boot/dts/qcom/lito.dtsi

+140 −0
Original line number Diff line number Diff line
@@ -509,6 +509,13 @@ 
			size = <0x0 0x400000>;

		};



		dump_mem: mem_dump_region {

			compatible = "shared-dma-pool";

			alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;

			reusable;

			size = <0 0x2400000>;

		};



		/* global autoconfigured region for contiguous allocations */

		linux,cma {

			compatible = "shared-dma-pool";
@@ -709,6 +716,94 @@ 
				0x10100 0x10100 0x25900 0x25900>;

	};



	jtag_mm0: jtagmm@7040000 {

		compatible = "qcom,jtagv8-mm";

		reg = <0x7040000 0x1000>;

		reg-names = "etm-base";



		clocks = <&aopcc QDSS_CLK>;

		clock-names = "core_clk";



		qcom,coresight-jtagmm-cpu = <&CPU0>;

	};



	jtag_mm1: jtagmm@7140000 {

		compatible = "qcom,jtagv8-mm";

		reg = <0x7140000 0x1000>;

		reg-names = "etm-base";



		clocks = <&aopcc QDSS_CLK>;

		clock-names = "core_clk";



		qcom,coresight-jtagmm-cpu = <&CPU1>;

	};



	jtag_mm2: jtagmm@7240000 {

		compatible = "qcom,jtagv8-mm";

		reg = <0x7240000 0x1000>;

		reg-names = "etm-base";



		clocks = <&aopcc QDSS_CLK>;

		clock-names = "core_clk";



		qcom,coresight-jtagmm-cpu = <&CPU2>;

	};



	jtag_mm3: jtagmm@7340000 {

		compatible = "qcom,jtagv8-mm";

		reg = <0x7340000 0x1000>;

		reg-names = "etm-base";



		clocks = <&aopcc QDSS_CLK>;

		clock-names = "core_clk";



		qcom,coresight-jtagmm-cpu = <&CPU3>;

	};



	jtag_mm4: jtagmm@7440000 {

		compatible = "qcom,jtagv8-mm";

		reg = <0x7440000 0x1000>;

		reg-names = "etm-base";



		clocks = <&aopcc QDSS_CLK>;

		clock-names = "core_clk";



		qcom,coresight-jtagmm-cpu = <&CPU4>;

	};



	jtag_mm5: jtagmm@7540000 {

		compatible = "qcom,jtagv8-mm";

		reg = <0x7540000 0x1000>;

		reg-names = "etm-base";



		clocks = <&aopcc QDSS_CLK>;

		clock-names = "core_clk";



		qcom,coresight-jtagmm-cpu = <&CPU5>;

	};



	jtag_mm6: jtagmm@7640000 {

		compatible = "qcom,jtagv8-mm";

		reg = <0x7640000 0x1000>;

		reg-names = "etm-base";



		clocks = <&aopcc QDSS_CLK>;

		clock-names = "core_clk";



		qcom,coresight-jtagmm-cpu = <&CPU6>;

	};



	jtag_mm7: jtagmm@7740000 {

		compatible = "qcom,jtagv8-mm";

		reg = <0x7740000 0x1000>;

		reg-names = "etm-base";



		clocks = <&aopcc QDSS_CLK>;

		clock-names = "core_clk";



		qcom,coresight-jtagmm-cpu = <&CPU7>;

	};



	cpuss_dump {

		compatible = "qcom,cpuss-dump";
@@ -1247,6 +1342,51 @@ 
		interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>;

	};



	mem_dump {

		compatible = "qcom,mem-dump";

		memory-region = <&dump_mem>;



		rpmh {

			qcom,dump-size = <0x2000000>;

			qcom,dump-id = <0xec>;

		};



		rpm_sw {

			qcom,dump-size = <0x28000>;

			qcom,dump-id = <0xea>;

		};



		pmic {

			qcom,dump-size = <0x80000>;

			qcom,dump-id = <0xe4>;

		};



		fcm {

			qcom,dump-size = <0x8400>;

			qcom,dump-id = <0xee>;

		};



		etf_swao {

			qcom,dump-size = <0x10000>;

			qcom,dump-id = <0xf1>;

		};



		etr_reg {

			qcom,dump-size = <0x1000>;

			qcom,dump-id = <0x100>;

		};



		etfswao_reg {

			qcom,dump-size = <0x1000>;

			qcom,dump-id = <0x102>;

		};



		misc_data {

			qcom,dump-size = <0x1000>;

			qcom,dump-id = <0xe8>;

		};

	};



	qcom,chd_silver {

		compatible = "qcom,core-hang-detect";

		label = "silver";