Merge "kgsl: Parse secure mapping size from dts" (51108242) · Commits · e / devices / android_kernel_xiaomi_nabu

Documentation/devicetree/bindings/gpu/adreno-iommu.txt

+2 −0

Original line number	Diff line number	Diff line
		@@ -38,6 +38,8 @@ Optional properties:
		be aligned
		- qcom,unmap_fast : A boolean specifying if iommu unmap fast is supported on
		this target.
		- qcom,secure-size : Specifies the size of gpu address region to be used for
		secure memory mapping.

		- List of sub nodes, one for each of the translation context banks supported.
		The driver uses the names of these nodes to determine how they are used,

drivers/gpu/msm/adreno.c

+2 −2

Original line number	Diff line number	Diff line
		@@ -1814,10 +1814,10 @@ static void _set_secvid(struct kgsl_device *device)
		adreno_writereg64(adreno_dev,
		ADRENO_REG_RBBM_SECVID_TSB_TRUSTED_BASE,
		ADRENO_REG_RBBM_SECVID_TSB_TRUSTED_BASE_HI,
		KGSL_IOMMU_SECURE_BASE(&device->mmu));
		device->mmu.secure_base);
		adreno_writereg(adreno_dev,
		ADRENO_REG_RBBM_SECVID_TSB_TRUSTED_SIZE,
		KGSL_IOMMU_SECURE_SIZE);
		device->mmu.secure_size);
		if (ADRENO_QUIRK(adreno_dev, ADRENO_QUIRK_SECVID_SET_ONCE))
		set = true;
		}

drivers/gpu/msm/kgsl_iommu.c

+21 −12

Original line number	Diff line number	Diff line
		/* Copyright (c) 2011-2019, The Linux Foundation. All rights reserved.
		/* Copyright (c) 2011-2020, The Linux Foundation. All rights reserved.
		*
		* This program is free software; you can redistribute it and/or modify
		* it under the terms of the GNU General Public License version 2 and
		@@ -189,7 +189,7 @@ int kgsl_iommu_map_global_secure_pt_entry(struct kgsl_device *device,
		struct kgsl_pagetable *pagetable = device->mmu.securepagetable;

		entry->pagetable = pagetable;
		entry->gpuaddr = KGSL_IOMMU_SECURE_BASE(&device->mmu) +
		entry->gpuaddr = device->mmu.secure_base +
		secure_global_size;

		ret = kgsl_mmu_map(pagetable, entry);
		@@ -1097,13 +1097,13 @@ static void setup_64bit_pagetable(struct kgsl_mmu *mmu,
		struct kgsl_iommu_pt *pt)
		{
		if (mmu->secured && pagetable->name == KGSL_MMU_SECURE_PT) {
		pt->compat_va_start = KGSL_IOMMU_SECURE_BASE(mmu);
		pt->compat_va_start = mmu->secure_base;
		pt->compat_va_end = KGSL_IOMMU_SECURE_END(mmu);
		pt->va_start = KGSL_IOMMU_SECURE_BASE(mmu);
		pt->va_start = mmu->secure_base;
		pt->va_end = KGSL_IOMMU_SECURE_END(mmu);
		} else {
		pt->compat_va_start = mmu->svm_base32;
		pt->compat_va_end = KGSL_IOMMU_SECURE_BASE(mmu);
		pt->compat_va_end = mmu->secure_base;
		pt->va_start = KGSL_IOMMU_VA_BASE64;
		pt->va_end = KGSL_IOMMU_VA_END64;
		}
		@@ -1112,7 +1112,7 @@ static void setup_64bit_pagetable(struct kgsl_mmu *mmu,
		pagetable->name != KGSL_MMU_SECURE_PT) {
		if (kgsl_is_compat_task()) {
		pt->svm_start = mmu->svm_base32;
		pt->svm_end = KGSL_IOMMU_SECURE_BASE(mmu);
		pt->svm_end = mmu->secure_base;
		} else {
		pt->svm_start = KGSL_IOMMU_SVM_BASE64;
		pt->svm_end = KGSL_IOMMU_SVM_END64;
		@@ -1126,13 +1126,13 @@ static void setup_32bit_pagetable(struct kgsl_mmu *mmu,
		{
		if (mmu->secured) {
		if (pagetable->name == KGSL_MMU_SECURE_PT) {
		pt->compat_va_start = KGSL_IOMMU_SECURE_BASE(mmu);
		pt->compat_va_start = mmu->secure_base;
		pt->compat_va_end = KGSL_IOMMU_SECURE_END(mmu);
		pt->va_start = KGSL_IOMMU_SECURE_BASE(mmu);
		pt->va_start = mmu->secure_base;
		pt->va_end = KGSL_IOMMU_SECURE_END(mmu);
		} else {
		pt->va_start = mmu->svm_base32;
		pt->va_end = KGSL_IOMMU_SECURE_BASE(mmu);
		pt->va_end = mmu->secure_base;
		pt->compat_va_start = pt->va_start;
		pt->compat_va_end = pt->va_end;
		}
		@@ -2725,6 +2725,7 @@ static int _kgsl_iommu_probe(struct kgsl_device *device,
		u32 reg_val[2];
		int i = 0;
		struct kgsl_iommu *iommu = KGSL_IOMMU_PRIV(device);
		struct kgsl_mmu *mmu = &device->mmu;
		struct kgsl_pwrctrl *pwr = &device->pwrctrl;
		struct device_node *child;
		struct platform_device *pdev = of_find_device_by_node(node);
		@@ -2769,7 +2770,7 @@ static int _kgsl_iommu_probe(struct kgsl_device *device,

		for (i = 0; i < ARRAY_SIZE(kgsl_iommu_features); i++) {
		if (of_property_read_bool(node, kgsl_iommu_features[i].feature))
		device->mmu.features \|= kgsl_iommu_features[i].bit;
		mmu->features \|= kgsl_iommu_features[i].bit;
		}

		/*
		@@ -2790,8 +2791,16 @@ static int _kgsl_iommu_probe(struct kgsl_device *device,
		iommu->micro_mmu_ctrl = UINT_MAX;

		if (of_property_read_u32(node, "qcom,secure_align_mask",
		&device->mmu.secure_align_mask))
		device->mmu.secure_align_mask = 0xfff;
		&mmu->secure_align_mask))
		mmu->secure_align_mask = 0xfff;

		if (of_property_read_u32(node, "qcom,secure-size", &mmu->secure_size))
		mmu->secure_size = KGSL_IOMMU_SECURE_SIZE;
		else if (mmu->secure_size >
		(KGSL_IOMMU_SECURE_END(mmu) - mmu->svm_base32))
		mmu->secure_size = KGSL_IOMMU_SECURE_SIZE;

		mmu->secure_base = KGSL_IOMMU_SECURE_END(mmu) - mmu->secure_size;

		/* Fill out the rest of the devices in the node */
		of_platform_populate(node, NULL, NULL, &pdev->dev);

drivers/gpu/msm/kgsl_iommu.h

+1 −3

Original line number	Diff line number	Diff line
		/* Copyright (c) 2012-2019, The Linux Foundation. All rights reserved.
		/* Copyright (c) 2012-2020, The Linux Foundation. All rights reserved.
		*
		* This program is free software; you can redistribute it and/or modify
		* it under the terms of the GNU General Public License version 2 and
		@@ -33,8 +33,6 @@

		#define KGSL_IOMMU_SECURE_SIZE SZ_256M
		#define KGSL_IOMMU_SECURE_END(_mmu) KGSL_IOMMU_GLOBAL_MEM_BASE(_mmu)
		#define KGSL_IOMMU_SECURE_BASE(_mmu) \
		(KGSL_IOMMU_GLOBAL_MEM_BASE(_mmu) - KGSL_IOMMU_SECURE_SIZE)

		#define KGSL_IOMMU_SVM_BASE32 0x300000
		#define KGSL_IOMMU_SVM_END32 (0xC0000000 - SZ_16M)

drivers/gpu/msm/kgsl_mmu.h

+3 −1

Original line number	Diff line number	Diff line
		/* Copyright (c) 2002,2007-2019, The Linux Foundation. All rights reserved.
		/* Copyright (c) 2002,2007-2020, The Linux Foundation. All rights reserved.
		*
		* This program is free software; you can redistribute it and/or modify
		* it under the terms of the GNU General Public License version 2 and
		@@ -170,6 +170,8 @@ struct kgsl_mmu {
		unsigned int secure_align_mask;
		uint64_t va_padding;
		unsigned int svm_base32;
		unsigned int secure_base;
		unsigned int secure_size;
		union {
		struct kgsl_iommu iommu;
		} priv;