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Commit 4fa43501 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'release' of git://lm-sensors.org/kernel/mhoffman/hwmon-2.6 

* 'release' of git://lm-sensors.org/kernel/mhoffman/hwmon-2.6: (53 commits)
  hwmon: (vt8231) fix sparse warning
  hwmon: (sis5595) fix sparse warning
  hwmon: (w83627hf) don't assume bank 0
  hwmon: (w83627hf) Fix setting fan min right after driver load
  hwmon: (w83627hf) De-macro sysfs callback functions
  hwmon: Add new combined driver for FSC chips
  hwmon: (ibmpex) Release IPMI user if hwmon registration fails
  hwmon: (dme1737) Add sch311x support
  hwmon: (dme1737) group functions logically
  hwmon: (dme1737) cleanups
  hwmon: IBM power meter driver
  hwmon: (coretemp) Add support for Celeron 4xx
  hwmon: (lm87) Disable VID when it should be
  hwmon: (w83781d) Add individual alarm and beep files
  hwmon: VRM is not read from registers
  MAINTAINERS: update hwmon subsystem git trees
  hwmon: Fix the code examples in documentation
  hwmon: update sysfs interface document - error handling
  hwmon: (thmc50) Fix a debug message
  hwmon: (thmc50) Don't create temp3 if not enabled
  ...
parents 7441dd12 a022fef5

Documentation/hwmon/coretemp

+1 −1
Original line number Diff line number Diff line
@@ -4,7 +4,7 @@ Kernel driver coretemp 
Supported chips:

  * All Intel Core family

    Prefix: 'coretemp'

    CPUID: family 0x6, models 0xe, 0xf

    CPUID: family 0x6, models 0xe, 0xf, 0x16

    Datasheet: Intel 64 and IA-32 Architectures Software Developer's Manual

               Volume 3A: System Programming Guide

Documentation/hwmon/dme1737

+23 −10
Original line number Diff line number Diff line
@@ -6,6 +6,10 @@ Supported chips: 
    Prefix: 'dme1737'

    Addresses scanned: I2C 0x2c, 0x2d, 0x2e

    Datasheet: Provided by SMSC upon request and under NDA

  * SMSC SCH3112, SCH3114, SCH3116

    Prefix: 'sch311x'

    Addresses scanned: none, address read from Super-I/O config space

    Datasheet: http://www.nuhorizons.com/FeaturedProducts/Volume1/SMSC/311x.pdf



Authors:

    Juerg Haefliger <juergh@gmail.com>
@@ -27,16 +31,25 @@ Description 
-----------



This driver implements support for the hardware monitoring capabilities of the

SMSC DME1737 and Asus A8000 (which are the same) Super-I/O chips. This chip

features monitoring of 3 temp sensors temp[1-3] (2 remote diodes and 1

internal), 7 voltages in[0-6] (6 external and 1 internal) and 6 fan speeds

fan[1-6]. Additionally, the chip implements 5 PWM outputs pwm[1-3,5-6] for

controlling fan speeds both manually and automatically.



Fan[3-6] and pwm[3,5-6] are optional features and their availability is

dependent on the configuration of the chip. The driver will detect which

features are present during initialization and create the sysfs attributes

accordingly.

SMSC DME1737 and Asus A8000 (which are the same) and SMSC SCH311x Super-I/O

chips. These chips feature monitoring of 3 temp sensors temp[1-3] (2 remote

diodes and 1 internal), 7 voltages in[0-6] (6 external and 1 internal) and up

to 6 fan speeds fan[1-6]. Additionally, the chips implement up to 5 PWM

outputs pwm[1-3,5-6] for controlling fan speeds both manually and

automatically.



For the DME1737 and A8000, fan[1-2] and pwm[1-2] are always present. Fan[3-6]

and pwm[3,5-6] are optional features and their availability depends on the

configuration of the chip. The driver will detect which features are present

during initialization and create the sysfs attributes accordingly.



For the SCH311x, fan[1-3] and pwm[1-3] are always present and fan[4-6] and

pwm[5-6] don't exist.



The hardware monitoring features of the DME1737 and A8000 are only accessible

via SMBus, while the SCH311x only provides access via the ISA bus. The driver

will therefore register itself as an I2C client driver if it detects a DME1737

or A8000 and as a platform driver if it detects a SCH311x chip.





Voltage Monitoring

Documentation/hwmon/f71805f

+7 −0
Original line number Diff line number Diff line
@@ -6,6 +6,10 @@ Supported chips: 
    Prefix: 'f71805f'

    Addresses scanned: none, address read from Super I/O config space

    Datasheet: Available from the Fintek website

  * Fintek F71806F/FG

    Prefix: 'f71872f'

    Addresses scanned: none, address read from Super I/O config space

    Datasheet: Available from the Fintek website

  * Fintek F71872F/FG

    Prefix: 'f71872f'

    Addresses scanned: none, address read from Super I/O config space
@@ -38,6 +42,9 @@ The Fintek F71872F/FG Super I/O chip is almost the same, with two 
additional internal voltages monitored (VSB and battery). It also features

6 VID inputs. The VID inputs are not yet supported by this driver.



The Fintek F71806F/FG Super-I/O chip is essentially the same as the

F71872F/FG, and is undistinguishable therefrom.



The driver assumes that no more than one chip is present, which seems

reasonable.

Documentation/hwmon/it87

+2 −1
Original line number Diff line number Diff line
@@ -90,7 +90,8 @@ upper VID bits share their pins with voltage inputs (in5 and in6) so you 
can't have both on a given board.



The IT8716F, IT8718F and later IT8712F revisions have support for

2 additional fans. They are not yet supported by the driver.

2 additional fans. They are supported by the driver for the IT8716F and

IT8718F but not for the IT8712F



The IT8716F and IT8718F, and late IT8712F and IT8705F also have optional

16-bit tachometer counters for fans 1 to 3. This is better (no more fan

Documentation/hwmon/lm78

+0 −10
Original line number Diff line number Diff line
@@ -56,16 +56,6 @@ should work with. This is hardcoded by the mainboard and/or processor itself. 
It is a value in volts. When it is unconnected, you will often find the

value 3.50 V here.



In addition to the alarms described above, there are a couple of additional

ones. There is a BTI alarm, which gets triggered when an external chip has

crossed its limits. Usually, this is connected to all LM75 chips; if at

least one crosses its limits, this bit gets set. The CHAS alarm triggers

if your computer case is open. The FIFO alarms should never trigger; it

indicates an internal error. The SMI_IN alarm indicates some other chip

has triggered an SMI interrupt. As we do not use SMI interrupts at all,

this condition usually indicates there is a problem with some other

device.



If an alarm triggers, it will remain triggered until the hardware register

is read at least once. This means that the cause for the alarm may

already have disappeared! Note that in the current implementation, all