Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 4eaf3fc9 authored by Shefali Jain's avatar Shefali Jain Committed by Gerrit - the friendly Code Review server
Browse files

clk: qcom: alpha-pll: Add support to adjust postdiv factor in slew ops 



There could be a requirement where the PLL postdiv is being set by
either HW or SW. In those cases the frequency of the PLL fout = fin
/postdiv and alpha pll round rate will result in wrong PLL L value.
Adjust the same by multiplying with the post div value before
passing rate in round rate.

Change-Id: I52e0ae3959d50ba8e37cea6eb72074d94bcbe9be
Signed-off-by: default avatarShefali Jain <shefjain@codeaurora.org>
parent 8f2d81a9

drivers/clk/qcom/clk-alpha-pll.c

+10 −9
Original line number Diff line number Diff line
@@ -1492,13 +1492,7 @@ static int clk_alpha_pll_slew_set_rate(struct clk_hw *hw, unsigned long rate, 
	const struct pll_vco *curr_vco = NULL, *vco;

	u32 l, ctl;

	u64 a;

	int i = 0, rc;



	if (!clk_hw_is_enabled(hw)) {

		rc = clk_alpha_pll_calibrate(hw);

		if (rc)

			return rc;

	}

	int i = 0;



	freq_hz = alpha_pll_round_rate(pll, rate, parent_rate, &l, &a);

	if (freq_hz != rate) {
@@ -1629,7 +1623,8 @@ static int clk_alpha_pll_calibrate(struct clk_hw *hw) 
	 * PLL is already running at calibration frequency.

	 * So slew pll to the previously set frequency.

	 */

	freq_hz = alpha_pll_round_rate(pll, clk_hw_get_rate(hw),

	freq_hz = alpha_pll_round_rate(pll, clk_hw_get_rate(hw) *

					clk_alpha_div_table[i].div,

					clk_hw_get_rate(parent), &l, &a);



	pr_debug("pll %s: setting back to required rate %lu, freq_hz %ld\n",
@@ -1650,6 +1645,12 @@ static int clk_alpha_pll_calibrate(struct clk_hw *hw) 


static int clk_alpha_pll_slew_enable(struct clk_hw *hw)

{

	int rc;



	rc = clk_alpha_pll_calibrate(hw);

	if (rc)

		return rc;



	return clk_alpha_pll_enable(hw);

}